Storage circuit and method of operating storage circuit

Abstract

A memory circuit and method of operating a memory circuit are disclosed. In various embodiments, a memory circuit is provided. The memory circuit may include: a plurality of electrically programmable memory cells arranged in an array of electrically programmable nonvolatile memory cells along a plurality of rows and a plurality of columns; a plurality of word lines each associated with a plurality of memory A plurality of word portions of cells are coupled, wherein each word portion is configured to store a word of data; and at least one overlapping word line is coupled to a plurality of overlapping portions, each overlapping portion comprising a plurality of overlapping memory cells, wherein a plurality of Each of the overlapping sections includes overlapping words, wherein the storage circuit is configured to read from each word section simultaneously with one of the overlapping sections for each of the plurality of word lines, thereby providing The result of the logical operation performed on the data word and the overlapping word is the output of the read operation.

Description

technical field [0001] Various embodiments relate generally to memory circuits and methods of operating memory circuits. Background technique [0002] In a basic typical arrangement, memory cells may be arranged in a matrix, where in one direction the memory cells may be connected to a common word line, and in an orthogonal direction they may be connected to a common bit line. More layers can be based on this arrangement, but this may be irrelevant in this article. [0003] In general, an "erase" operation may affect all memory cells connected to at least one word line, thereby setting them all to a value defining an unwritten state, such as "1"; a "write" operation may affect a memory cell connected to a Some memory cells of the word line, thereby setting them to a value that defines the write state, such as "0", where the specific memory cell to be written can be selected through the bit line; and the "read" operation can read Some memory cells connected to a word line, ...

AI Technical Summary

Problems solved by technology

[0006] This may be difficult to achieve if one has to assume that an attacker will be able to manipulate not only the erase, write, and / or read operations, but also the verify operation itself

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