Parallel character string matching algorithm based on FPGA

A string matching, string technology, applied in the field of information processing

Active Publication Date: 2018-10-09
SUN YAT SEN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, during the entire matching process, the i pointer does not backtrack

Method used

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  • Parallel character string matching algorithm based on FPGA
  • Parallel character string matching algorithm based on FPGA
  • Parallel character string matching algorithm based on FPGA

Examples

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Embodiment 1

[0113] In order to explain the technical solution in detail, give how to realize the design of this solution in FPGA, and give an example, the pattern string P=abcdabd, the substring of the first j characters has been given in Table 2-2 , along with its prefix and suffix and the maximum common element length. like Image 6 Shown is the parallel processing of this pattern string. The substrings corresponding to j=2 to j=6 are compared respectively, and each is regarded as a module, specifically:

[0114] j=2: compare a and b, if they are equal, output s1=1, otherwise s1=0;

[0115] j=3: compare a and c, ab and bc, if they are equal, output s2=1, s3=1, otherwise s2=0, s3=0;

[0116] j=4: compare a and d, ab and cd, abc and bcd, if they are equal, output s4=1, s5=1, s6=1, otherwise s4=0, s5=0, s6=0;

[0117] j=5: Compare a and a, ab and da, abc and cda, abcd and cdba, if they are equal, output s7=1, s8=1, s9=1, s10=1, otherwise s7=0, s8=0 , s9=0, s10=0;

[0118] j=6: compar...

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Abstract

The invention relates to a parallel character string matching algorithm based on an FPGA. Sub-strings of first j characters in mode character strings and the maximum public element values of the prefixes and suffixes of the sub-strings are found within one clock cycle through FPGA parallel treatment, an NEXT array can be directly obtained and output through the maximum public element values of theprefixes and suffixes, and the parallel matching of the mode character strings can be realized through the NEXT array.

Description

technical field [0001] The present invention relates to the field of information processing, more specifically, to a parallel character string matching algorithm based on FPGA. Background technique [0002] With the continuous development of computer hardware, the parallel data processing of CPU and coprocessor in servers and terminals has been widely used, especially the acceleration of FPGA in computing data-intensive. FPGA has significant advantages such as reconfigurability and high degree of parallelization, and has become a commonly used acceleration device. In recent years, more and more FPGA parallel processing architectures are deployed based on data centers, and complex algorithms are accelerated using FPGA hardware resources. A new way to optimize performance. For the string matching algorithm in the process of information processing, at present, there are KMP algorithm, BM algorithm and a QS algorithm improved based on BM algorithm. Now it has been widely used ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/30
Inventor 黄以华殷海元
Owner SUN YAT SEN UNIV
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