Method for improving automatic verification platform efficiency through building reference model by using Python

An automatic verification and reference model technology, applied in the field of chip verification, to achieve the effect of improving development efficiency, improving verification efficiency, and developing efficiency

Active Publication Date: 2018-11-16
BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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Problems solved by technology

[0006] The technical problem solved by the present invention is to solve the problem of calling the Python reference model by the SystemVerilog verification platform by encapsulating the Python function with the C function for the current complex chip verification, and proposes a method of using Python to build a reference model to improve the efficiency of the automated verification platform method, greatly improving the verification efficiency

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  • Method for improving automatic verification platform efficiency through building reference model by using Python
  • Method for improving automatic verification platform efficiency through building reference model by using Python

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[0048] The present invention will be further described below in conjunction with the drawings and specific embodiments.

[0049] The following describes the specific implementation steps in conjunction with the verification of the PKE (Public Key Engine) coprocessor.

[0050] figure 1 Is the specific implementation flow chart. The first and third steps are to define the interface specification of the Python function and the definition of the C interface specification respectively. Since PKE designs 2048-bit long integer operations, the basic variables of C programs are only 64 bits long (unsigned long integer), so For transmission parameters larger than 64 bits, the input variables from C to Python and the output variables from Python to C can only be composite types composed of 64-bit long variables. Specifically, it is a tuple type consisting of multiple 64-bit integers on the Python side, and a PyTuple type on the C side.

[0051] The seventh step is to define the SystemVerilog ...

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Abstract

The invention discloses a method for improving automatic verification platform efficiency through building a reference model by using Python. A C program is used as a middle layer, so that the C program can call a Python reference model via a C / Python API, and can call a C interface program of the middle layer via a SystemVerilog DPI, and thus the purpose that the SystemVerilog verification platform calls the Python is achieved. According to the method provided by the invention, the reference model can be compiled by using the Python language, and the Python reference model can be dynamicallycalled in real time in the verification platform. The method of developing the program by using the Python language has many advantages, particularly has extremely high efficiency during complex algorithms such as long integer operation; according to the method, the problem of interaction between the SystemVerilog language and the Python language is solved, so that the Python program can server asthe reference model in the verification platform, the verification efficiency and quality are greatly enhanced, and the verification cost is reduced.

Description

Technical field [0001] The invention relates to chip verification technology, and specifically refers to a method for building a reference model with Python to improve the efficiency of an automated verification platform. Background technique [0002] With the increasing scale and complexity of chip design, chip verification becomes more and more difficult. Many reference models need to be written in the verification work. Some reference models have high algorithm complexity, especially the reference model corresponding to the algorithm coprocessor. [0003] Traditional reference models are usually written in C language, etc. The development efficiency of writing reference models in C language is low. When it comes to long integer operations, the development of a reference model in C language requires a large array to represent long integers, and issues such as carry transfer must be considered during operations. Therefore, a more efficient and concise reference model development...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F8/20G06F8/35
CPCG06F8/20G06F8/35
Inventor 任志强
Owner BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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