A parallel automated verification method for a processor instruction set

An automatic verification and processor instruction technology, applied in the direction of concurrent instruction execution, machine execution device, etc., can solve the problems of few operable methods and no instruction verification method, and achieve high reusability

Active Publication Date: 2019-01-11
XIAN MICROELECTRONICS TECH INST
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] At present, there are few domestic and foreign verification documents on digital integrated circuit processors, and there are relatively few known verification technologies and practical methods. Form an automated instruction verification method

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  • A parallel automated verification method for a processor instruction set
  • A parallel automated verification method for a processor instruction set
  • A parallel automated verification method for a processor instruction set

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Embodiment Construction

[0034] Below in conjunction with accompanying drawing, the present invention is described in further detail:

[0035] Aiming at the problem of huge processor verification space, the proposed processor instruction verification method can automatically generate a large number of single and cross instruction verification cases; it can truly simulate the operation of the processor, automatically identify instructions, and automatically generate expected results , which solves the problems of difficult control and query of the destination address of the jump instruction, and the expected result cannot be automatically calculated; it can also realize batch parallel simulation and automatic inspection of simulation results, and generate result log files at the same time, which is convenient for quick location and analysis of problems, and improves verification. Simulation coverage and efficiency.

[0036] In the most ideal situation, the method can traverse each instruction, each reg...

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Abstract

The invention discloses a parallel automatic verification method for a processor instruction set. Firstly, an instruction verification use case is automatically generated. Then the validation case issimulated on RTL circuit and the simulation results are monitored. At the same time, the verification case obtained in the step 1 is processed by the processor reference model to calculate the expected result; finally, the format consistency between the simulation results and the expected results is processed, and then the results are compared. When the two results are consistent, the simulation results are correct. When the two results are inconsistent, the simulation results are incorrect and an error log is generated. The method of the invention can carry out efficient, comprehensive and accurate instruction simulation verification in a limited time, so as to ensure the correctness of the chip function.

Description

technical field [0001] The invention belongs to the verification field of digital integrated circuit processors, in particular to a parallel automatic verification method for processor instruction sets. Background technique [0002] With the continuous expansion of the scale of digital integrated circuits, the functions of chip integration are becoming more and more complex, and the number of supported instructions is increasing. The verification of digital integrated circuit instructions has become an important factor restricting the development of chip verification. Verification Because the verification space is very large, there is no automatic method for checking the verification results, and it is difficult to calculate the expected results of control and floating-point instructions. Therefore, the verification of instructions has become a difficult problem in the verification of current digital integrated circuits. In order to ensure the correctness of processor functi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38
CPCG06F9/3867
Inventor 张辉孙健王璟琛刘明王宇飞
Owner XIAN MICROELECTRONICS TECH INST
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