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mram and how to make it

A manufacturing method and technology of metal wires, applied in the manufacture/processing of electromagnetic devices, resistors controlled by magnetic fields, digital memory information, etc., can solve the problems of not being able to obtain sufficiently flat bottom electrodes, etc.

Active Publication Date: 2022-07-15
CETHIK GRP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The main purpose of this application is to provide a kind of MRAM and its manufacturing method, to solve the problem of not being able to obtain a sufficiently flat bottom electrode in the prior art

Method used

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  • mram and how to make it
  • mram and how to make it
  • mram and how to make it

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0061] The method of making MRAM includes:

[0062] Prepare the substrate 1 including the base and the structure prepared by the previous process on the base;

[0063] A metal wire layer 2 is formed on the surface of the substrate 1 using a Damascus process, such as figure 2 As shown, the above-mentioned metal wire layer 2 includes a plurality of spaced metal wire portions;

[0064] NDC is deposited on the surface of each metal wire portion away from the substrate 1 to form a barrier layer 3;

[0065] Formation of SiO by PECVD using TEOS on barrier layer 3 2 layer, that is, to form image 3 Dielectric layer 4 shown;

[0066] The through hole 5 including the first part 51 and the second part 52 is formed by a double damascene process, such as Figure 4 As shown, the first part 51 is close to the substrate 1, the second part 52 is in communication with the first part 51, and the depth of the first part 51 is The depth of the above-mentioned second part 52 is And the wi...

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Abstract

The present application provides an MRAM and a manufacturing method thereof. The manufacturing method includes: step S1, disposing a metal wire layer on the surface of the substrate; step S3, disposing a dielectric layer on the surface of the metal wire layer away from the substrate; step S4, using a double damascene process to form a plurality of spaced A through hole, the through hole includes a first part and a second part, the depth of the second part is smaller than the depth of the first part, and the width of the second part is larger than the width of the first part; step S5, fill the bottom electrode material in each through hole to form a bottom Electrodes, the surface of the bottom electrode away from the substrate and the surface of the dielectric layer away from the substrate are on the same plane, and the material of the bottom electrode is a non-copper conductive material. The method avoids the two-step process of first filling copper in the through hole and then arranging the bottom electrode on the copper, and because no Cu is arranged, the problem that a relatively flat surface cannot be formed due to the low hardness of Cu is avoided.

Description

technical field [0001] The present application relates to the field of semiconductor storage, and in particular, to an MRAM and a manufacturing method thereof. Background technique [0002] Magnetic Random Access Memory (MRAM) is a new type of non-volatile memory. Compared with other types of memory at present, it has the advantages of fast read and write speed, infinite erasing and rewriting, and easy compatibility with current semiconductor technology. In addition, the use of spin current to realize the spin transfer torque (Spin transfer torque, STT) of the magnetic moment can realize the miniaturization of the memory cell size. These advantages make MRAM the main development direction of new types of memory in the future. [0003] The main functional unit in MRAM is MTJ unit, and its structure mainly includes magnetic free layer / non-magnetic oxide layer (MgO) / magnetic pinned layer. Driven by an external magnetic field or current, the direction of the magnetic moment of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L43/08H01L43/12G11C11/16H10N50/10H10N50/01
CPCG11C11/161H10N50/01H10N50/10
Inventor 王雷刘鲁萍
Owner CETHIK GRP