Three-dimensional storage device

Abstract

Embodiments of three-dimensional (3D) memory devices are disclosed. In an example, a 3D memory device includes a substrate, a peripheral device disposed on the substrate, a memory stacked layer disposed over the peripheral device and including a plurality of conductor / dielectric layer pairs, and a plurality of memory strings. Each memory string extends vertically through the memory stack layer andincludes a source select gate above the drain select gate and the drain select gate. The edges of the conductor / dielectric layer pairs along the vertical direction away from the substrate in the stepped structure of the storage stacked layer are staggered laterally toward the memory strings.

Description

Background technique [0001] Embodiments of the present disclosure relate to three-dimensional (3D) memory devices and methods of manufacturing the same. [0002] Planar memory cells are scaled to smaller sizes by improving process technology, circuit design, programming algorithms, and manufacturing processes. However, as the feature size of memory cells approaches the lower limit, planar processes and fabrication techniques become challenging and costly. As a result, the storage density of planar memory cells approaches the upper limit. [0003] 3D memory architectures can address density limitations in planar memory cells. A 3D memory architecture includes a memory array and peripherals for controlling signals to and from the memory array. Contents of the invention [0004] Embodiments of 3D memory devices are disclosed herein. [0005] In one example, a 3D memory device includes a substrate, a peripheral device disposed on the substrate, a memory stack layer disposed ...

AI Technical Summary

Problems solved by technology

However, as the feature size of memory cells approaches the lower limit, planar processes and fabrication techniques become challenging and costly

As a result, the storage density of planar memory cells approaches the upper limit

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