A method and apparatus for using cyclic addressing in convolution operations

Abstract

A method and apparatus for performing cyclic addressing to simulate almost infinite memory space despite a fixed capacity of physical memory by re-addressing a portion of data beyond a predefined length of the cyclic addressing region to another predefined address in the cyclic addressing region is disclosed. Recalculated circular addresses can be used to load and calculate the data fragments in adata sample for different applications.

Description

technical field [0001] The present invention relates generally to memory addressing, and more particularly to a method and method for using circular memory addressing in applications such as machine learning based applications using convolutional neural networks to reduce memory access bandwidth device. Background technique [0002] Rapid and continuous progress in convolutional neural networks (CNNs) has led to an increasing number of CNN-based applications, such as object recognition, tracking, and classification. Most CNN-based (or other model-based) applications not only require high-precision performance, but are also sensitive to energy or power consumption and cost. Power consumption and cost considerations are especially important for embedded devices with small form factors, limited memory space, and battery power such as smartphones, tablet computers, and other mobile handheld devices. One way to reduce the cost and power consumption of running applications on su...

AI Technical Summary

Problems solved by technology

As a result, the portion of data starting at 384KB and ending at 416KB is cached twice, once for fragment 3 and once for fragment 4, wasting limited memory resources

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