A kind of nand flash memory data management method and device
A technology of data management and flash memory, which is applied in the computer field, can solve the problems of increasing error checking and correcting overhead and reducing the performance of NAND flash data reading, so as to improve reading performance, reduce error checking and correcting overhead, and reduce data The effect of BER
Active Publication Date: 2021-06-29
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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Problems solved by technology
[0004] The inventor found through research that if the NAND flash data is not read for a long time, when the NAND flash data is read again, only using ECC technology to check and correct data errors can no longer effectively achieve the purpose of reducing the data BER, and other technologies need to be used means, increase error checking and correction overhead, and reduce NAND flash data read performance
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[0034] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiment of the application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiment of the application. Obviously, the described embodiment is only It is a part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.
[0035] At this stage, based on a large number of studies on NAND flash data in SSDs, it can be known that the data BER of NADA flash data will change with storage time and read operations, such as figure 1 The schematic diagram of the change law of the data BER of the NAND flash memory data is shown, wherein the abscissa is the time after the first read operation u...
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The present application discloses a method and device for managing NAND flash memory data. The method includes: triggering the read operation of the target NAND flash memory data every preset cycle, and the preset cycle is based on the target NAND flash memory data not being read for a long time from the first After a read operation is performed, the data bit error rate is determined by the elapsed time from high to minimum; in response to the read operation of the target NAND flash memory data, each block in each plane of the target NAND flash memory is read within a preset period. It can be seen that based on the preset cycle obtained by the data BER change rule of the target NAND flash memory data after the read operation, the read operation of the target NAND flash memory data is triggered regularly to effectively reduce the data BER during the read operation of the target NAND flash memory data. Additional technical means for error checking and correction are added to reduce correction overhead and improve read performance.
Description
technical field [0001] The present application relates to the field of computer technology, in particular to a method and device for managing NAND flash memory data. Background technique [0002] With the development of information science and technology, solid state drives (English: Solid State Drives, abbreviation: SSD) are often used in practical applications. During the storage cycle of NAND flash memory in SSD, various factors may cause data errors , Therefore, the SSD adds an error checking and correcting (English: Error Checking and Correcting, abbreviation: ECC) function, which is used to read the NAND flash memory data, detect the correctness of the data and correct some errors, so as to reduce the data bit error rate ( English: Bit Error Ratio, abbreviation: BER). [0003] Based on the research on NAND flash data in SSD, it can be seen that after a NAND flash data read operation, the data BER of NAND flash data will gradually decrease, and then gradually increase ...
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IPC IPC(8): G06F3/06
CPCG06F3/061G06F3/064G06F3/0656G06F3/0679
Inventor 吕玉彬戚勇
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD