A key generation and verification method and system based on a hardware device

Abstract

The invention provides a key generation and verification method and system for product port protection based on a hardware device. The generation and verification method includes generating and verifying data; generating a root key by an authorized first hardware device connected with the production line controller; adopting a national cryptographic algorithm by an authorized second hardware device connected with the production line controller; utilizing root keys, generating an application key by using the product identifier as a dispersion factor, generating a key for port protection by using the application key and the product identifier as a dispersion factor by using an authorized third hardware device connected with a production line controller by using a national cryptographic algorithm, and writing the key for port protection into a protection domain of the product by using the production line controller; and reading, by the third hardware device, the application key from its base file, using the national cryptographic algorithm, using the application key, using the product identifier as a dispersion factor to generate a key for port protection, and comparing, by the production line controller, the generated key with the key in the protection domain to verify the port.

Description

technical field [0001] The present disclosure relates to a port protection method and system thereof, and more particularly, to a key generation and verification method for port protection of a product based on a hardware device and a system thereof. Background technique [0002] Debug ports are ports included with the device to simplify development and debugging, which are not required for proper operation of the device. The Debug port is usually not deleted or disabled, which avoids the cost of changing the design and is also helpful for engineers to trace, locate and debug problems. However, if the Debug port is not protected, the port will become an important interface for hackers or competitors to attack. For example: JTAG interface on the chip, LPC (Low PinCount) Debug port, Serial Wire Debug, Background Debug Mode Interface and Programand Debug Interface, etc. [0003] At present, there are roughly two protection methods adopted for the Debug port: one is to directl...

AI Technical Summary

Problems solved by technology

The method of directly closing the Debug port can safely protect the internal resources of the chip, but if there is a problem, it is very unfavorable for engineers to track, locate and debug the problem.

The second method uses a daemon process to protect the Debug port. Although the Debug port can be protected to a certain extent, this method is easily cracked and attacked by hackers.

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