A power device protection chip and its manufacturing method

A technology of a power device and a manufacturing method, applied in the field of power device protection chips, can solve the problems of complex chip design and unfavorable packaging, and achieve the effects of reducing packaging and manufacturing costs, facilitating and rapid packaging, and reducing parasitic capacitance.

Active Publication Date: 2021-06-11
SHENZHEN MYD INFORMATION TECH CO LTD
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the existing technology, in order to enhance the various performances of the chip, the chip design is often very complicated, which is not conducive to packaging.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A power device protection chip and its manufacturing method
  • A power device protection chip and its manufacturing method
  • A power device protection chip and its manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0018] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

[0019] Such as Figure 5 Shown, the technical means that the present invention adopts is as follows:

[0020] A power device protection chip, the power device protection chip includes a substrate 1 of a first conductivity type, a first epitaxial layer 2 of a first conductivity type, an injection region 4 of a second conductivity type, a second epitaxial layer 3, and a trench Groove 5, silicon oxide layer 6 and first metal layer 7, the first epitaxial layer 2 is formed on the upper surface of the substrate 1, the implantation region 4 is formed downward from the upper surface of the first epitaxial layer 2, and the second epitaxial layer 3 is formed On the upper surface of the first epitaxial layer 2, a trench 5 ext...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a power device protection chip. The power device protection chip includes a substrate of a first conductivity type, a first epitaxial layer of a first conductivity type, an injection region of a second conductivity type, a second epitaxial layer, and a groove. , a silicon oxide layer and a first metal layer, the first epitaxial layer is formed on the upper surface of the substrate, the implantation region is formed downward from the upper surface of the first epitaxial layer, the second epitaxial layer is formed on the upper surface of the first epitaxial layer, and the trench The groove extends downward from the upper surface of the second epitaxial layer and exposes the upper surface of the first epitaxial layer, the sidewall of the groove is formed with a silicon oxide layer, and the first metal layer fills the groove and is located on the upper surface of the implanted region . It also discloses a manufacturing method of the protection chip of the power device, which realizes fast packaging, and bidirectional multi-channel integration, thereby improving the performance of the device.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a power device protection chip. Background technique [0002] As semiconductor devices are increasingly miniaturized, high-density, and multi-functional, electronic devices are increasingly vulnerable to voltage surges, which can even cause fatal injuries. The power device protection chip is a solid-state semiconductor device specially designed to protect sensitive semiconductor devices from transient voltage surge damage. It has small clamping coefficient, small size, fast response, and low leakage current. Small size and high reliability, and various voltage surges from electrostatic discharge to lightning can induce transient current spikes. Power device protection chips are usually used to protect sensitive circuits from surges. However, in the existing technologies, in order to enhance various performances of the chip, the chip is often designed to be very complicate...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02H01L21/82
CPCH01L21/82H01L27/0255
Inventor 不公告发明人
Owner SHENZHEN MYD INFORMATION TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap