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Memory system and method for controlling nonvolatile memory

A memory system and non-volatile technology, which is applied in the field of memory system and non-volatile memory control, and can solve the problems of complex control of NAND flash memory

Inactive Publication Date: 2019-03-29
TOSHIBA MEMORY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, in general, since the control of the NAND type flash memory is complicated, when implementing a novel interface for improving I / O performance, appropriate role distribution between the host and the memory (memory system) must be considered

Method used

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  • Memory system and method for controlling nonvolatile memory
  • Memory system and method for controlling nonvolatile memory
  • Memory system and method for controlling nonvolatile memory

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Experimental program
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Embodiment Construction

[0048] Embodiments will be described below with reference to the drawings.

[0049] First, refer to figure 1 , the configuration of a computer system including a memory system according to an embodiment will be described.

[0050] This memory system is a semiconductor memory device configured to write data into a nonvolatile memory and read data from the nonvolatile memory. The memory system is implemented as a flash memory device 3 based on NAND flash technology.

[0051]The computer system may include a host (host device) 2 and a plurality of flash memory devices 3 . The host 2 may be a server configured such that a flash array including a plurality of flash storage devices 3 is used as a memory. The host (server) 2 and the plurality of flash storage devices 3 are connected to each other (interconnected internally) via the interface 50 . As the interface 50 for this internal interconnection, PCI Express (PCIe, Peripheral Component Interconnect Express, Peripheral Compone...

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PUM

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Abstract

According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address,a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.

Description

[0001] [Related applications] [0002] This application enjoys the priority of Japanese Patent Application No. 2017-181425 (filing date: September 21, 2017) as the basic application. This application incorporates all the contents of the basic application by referring to this basic application. technical field [0003] Embodiments of the present invention relate to a memory system and a control method for controlling a nonvolatile memory. Background technique [0004] In recent years, memory systems including nonvolatile memories have been widely used. [0005] As one of such memory systems, a solid state drive (SSD) based on NAND (Not AND) flash memory technology is known. [0006] In servers in data centers, SSDs are also used as storage. High I / O (Input / Output, input / output) performance is required for a memory utilized in a host computer such as a server. Therefore, novel interfaces between the host and the memory have recently started to be proposed. [0007] Howeve...

Claims

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Application Information

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IPC IPC(8): G06F3/06G06F12/02
CPCG06F3/061G06F3/0644G06F3/0679G06F12/0246G06F12/0804G06F12/1009G06F3/0616G06F3/0652G06F3/067G06F3/0688G06F3/064G06F2212/7205G06F12/0253G06F3/0659
Inventor 菅野伸一吉田英树
Owner TOSHIBA MEMORY CORP