A method for carrying out IIC expansion by using a PCA9548A expansion chip

A technology of PCA9548A and expansion chip, applied in the field of IIC expansion with PCA9548A expansion chip

Inactive Publication Date: 2019-04-02
TOEC TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In order to overcome the limited number of IIC interfaces provided by ZYNQ7000, how to use several existing IIC interfaces to control multiple IICs,...

Method used

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  • A method for carrying out IIC expansion by using a PCA9548A expansion chip
  • A method for carrying out IIC expansion by using a PCA9548A expansion chip

Examples

Experimental program
Comparison scheme
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Embodiment

[0038] Open the IIC node corresponding to ZYNQ, the corresponding IIC node in the embodiment is i2c-0:

[0039] fd = open(" / dev / i2c-0", O_RDWR);

[0040] The open function is a linux hardware device operation function, and its prototype is int open (const char * pathname, int flags); in the above example, const char * pathname corresponds to " / dev / i2c-0", indicating the I2C file node The path where the flags are located corresponds to O_RDWR, which means that the file is opened in a readable and writable manner. If the function is successfully executed, the file descriptor, namely fd, will be returned.

[0041] This node file corresponds to the two expansion chips PCA9548A expansion chip U31 and PCA9548A expansion chip U32. In order to distinguish these two expansion chips, the slave address should be different. The A 2， A 1， A 0 All are connected to the ground wire, that is, all are set to low level, then the final slave address of the U31 chip is 1110000, which correspond...

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PUM

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Abstract

The invention relates to a method for carrying out IIC expansion by using a PCA9548A expansion chip. A plurality of expansion chips are mounted on one file node. Firstly, the slave address of the PCA9548A is understood; the address naming rule is shown in the specification. The first four bits are fixed values; A2, the slave addresses of the devices A1 and A0 are related to hardware connection, atmost eight 9548A expansion chips can be mounted on one file node, and after a file node function is opened, the slave addresses of the devices need to be bound, and the function prototypes are as follows: ioctl (fd, 2C _ SLAVE _ FORCE, Addres), wherein Address is the front seven-bit address of the IIC device, different slave device addresses are bound to access different PCA9548A chips, and a PCA9548A routing mechanism is used for gating and connecting optical modules and controlling a plurality of optical modules. And the I/O and interruption resources of the zynq are saved, and the production cost is reduced.

Description

technical field [0001] The present invention relates to an optical signal convergence device, in particular to a method for IIC expansion using a PCA9548A expansion chip, which is used to realize the control of multi-channel optical modules. One ZYNQ IIC file node can connect 8 PCA9548a chips, each One PCA9548a chip can be expanded to 8 IIC interfaces, and each IIC interface is connected to an optical module, so that 64 optical modules can be controlled through one IIC file node, which greatly improves the utilization rate of the IIC file node. Background technique [0002] Using the existing IIC of ZYNQ7000 to control the optical module often fails to reach the number specified in the project. After all, the existing optical convergence series equipment has reached the TB / s level, so how to use the existing IIC interface provided by ZYNQ to control More optical modules are the subject of discussion and research by many hardware engineers. [0003] In the existing technical...

Claims

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Application Information

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IPC IPC(8): G06F13/38
CPCG06F13/385G06F2213/0016
Inventor 曹军伟陈伟峰刘佳
Owner TOEC TECH
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