CLB module positioning and versatility configuration testing method in K-series FPGA

Abstract

The invention provides a CLB module positioning and versatility configuration testing method in K7-series FPGA. The method comprises the steps of performing positioning for obtaining the specific positions of all CLB modules in the FPGA; performing left-and-right equal dividing on a CLB module array, wherein configuration is performed in a manner that the same-line CLB modules are parallel and thesame-column CLB modules are serial in each equal divided part, thereby realizing full coverage of a CLB resource; performing built-in self-testing on the configured CLB module array, through comparing the actually output data with expected data, determining whether a defect exists in the CLB module array, if a problem of a certain CLB module occurs, performing positioning for obtaining the specific error position of the CLB module according to correspondence between an output signal and a clock. The method for testing the CLB module positioning and versatility configuration in the K7-series FPBA has advantages of realizing positioning of all CLB modules, realizing no requirement for calculation of a specific position of a hollow array, optimizing a configuration program, realizing an optimal number of configurations, realizing versatility of the configuration program, and reducing time in repeated programming.

Description

technical field [0001] The present invention relates to the technical field of FPGA testing, in particular to K7 series FPGA internal CLB module positioning and universal configuration testing methods. Background technique [0002] Kintex-7 series FPGA is a high-end FPGA product developed by Xilinx. It is widely used in 3G / 4G wireless, flat panel display, Video, aerospace systems, etc. FPGA is mainly composed of programmable logic unit (CLB), input and output unit (IOB), 90% of the logic resource functions in the FPGA are realized by the CLB module, so the CLB module test occupies an important position in the FPGA test. However, the CLB module array of the K7 series FPGA is different from Xilinx's previous Virtex4 and Virtex5 series FPGAs. Its distribution is asymmetrical and has "holes", which require precise positioning of the CLB module array. [0003] For the "hole" CLB array, the traditional configuration program has two methods, adopting an all-serial architecture or ...

AI Technical Summary

Problems solved by technology

[0005] The object of the present invention is to provide K7 series FPGA internal CLB module location and universality configuration test method, to solve the CLB array existence " cavity " is difficult to locate and configuration program design complexity, the poor problem of configuration program portability

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