Fused memory

Abstract

The present disclosure provides a fused memory including a plurality of memory cells, wherein the memory cells include: a bulk substrate; a source and a drain over the bulk substrate and a region extending between the source and drain regions. The channel region; the ferroelectric layer, located on the channel region; the gate, located on the ferroelectric layer. The fusion memory of the present disclosure enables the storage unit to work in the charge trapping mode and the polarization inversion mode, therefore, the memory has both the functions of DRAM and NAND, and combines the advantages of both.

Description

technical field [0001] The present disclosure relates to the field of memory, and further relates to a fusion memory. Background technique [0002] Traditional DRAM (Dynamic Random Access Memory) adopts the memory cell structure of 1T1C (1 Transistor-1Capacitor, 1 Transistor-1 Capacitor). When the word line connected to the gate of the transistor is gated, the transistor is gated and can be read from the bit line. Take the bit information stored on the capacitor; traditional NAND uses floating gate (floating gate) or charge trapping structure; one of them is to realize dynamic random storage, and the other is to realize non-volatile storage, so these two types The preparation process of the memory is very different, and it cannot be integrated in a chip-on-chip (SOC) at the same time, so the advantages of the two types of memory cannot be combined, which limits the storage capacity and computing performance of the SOC chip. [0003] In the neural network, the memristor or t...

AI Technical Summary

Problems solved by technology

This type of structure has problems such as large operating current and high power consumption for training, which limits the number of parallelism

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