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Pulsed integrator and memory techniques

A technology of memory, memory unit, applied in the direction of static memory, digital memory information, information storage, etc.

Inactive Publication Date: 2019-07-16
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

FeRAM can use a device architecture similar to volatile memory, but can have non-volatile properties due to the use of ferroelectric capacitors as storage devices

Method used

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  • Pulsed integrator and memory techniques
  • Pulsed integrator and memory techniques
  • Pulsed integrator and memory techniques

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Embodiment Construction

[0028] Some memory devices can determine the state of a memory cell based on the amount of charge stored within the memory cell. Some such memory devices can utilize voltage sensing schemes to determine the amount of stored charge. For example, a voltage at a first node (eg, a node coupled to a memory cell, or a capacitor to which charge within a memory cell can be transferred) can be compared to a reference voltage and can be based on sensed Whether the voltage is greater than or less than the reference voltage determines the state of the memory cell. As another example, as part of a voltage sensing scheme for a FeRAM memory cell, a voltage may be applied to the memory cell, and the resulting voltage at a node (e.g., a sense node) may be compared to a reference voltage because The resulting voltage at the sense node may depend in part on the amount of charge stored within the memory cell prior to the voltage being applied.

[0029] However, some voltage sensing schemes may ...

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Abstract

The present invention provides a pulsed integrator and memory technologies. The methods, systems, and devices for a pulsed integrator and memory techniques are described. A first device may facilitatedischarging a memory cell using at least one current pulse until a voltage associated with the memory cell reaches a reference voltage. The discharge time of the memory cell may be determined based at least in part on a duration of at least one current pulse. In some examples, a state of the memory cell may be determined based at least in part on a discharge time.

Description

[0001] cross reference [0002] This patent application claims priority to U.S. Patent Application Serial No. 15 / 821,240, filed November 22, 2017, by Castro et al., entitled "Pulse Integrator and Memory Technology," said U.S. The patent application is assigned to the present assignee and is expressly incorporated herein by reference in its entirety. technical field [0003] The technical field relates to pulse integrators and memory technology. Background technique [0004] The following relates generally to operating memory arrays, and more specifically to pulse integrators and memory technology. [0005] Memory devices are widely used to store information in a variety of electronic devices such as computers, wireless communication devices, cameras, digital displays, and the like. Information is stored by programming different states of the memory device. For example, a binary device has two states, usually designated as a logic "1" or a logic "0." In other systems, mo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/22
CPCG11C11/221G11C11/2297G11C16/0483G11C16/32G11C16/26G11C16/30G11C13/0061G11C2013/0054G11C13/004G11C11/223G11C11/00G11C11/5657G11C11/22G11C11/16
Inventor 埃尔南·A·卡斯特罗杰里米·M·赫斯特
Owner MICRON TECH INC