A reading timing generation device with process fluctuation tolerance

Abstract

The present application discloses a device for generating read timing, including: a read unit output sense amplifier and N read unit single-column structures, and each read unit single-column structure has a precharge terminal, a word line terminal and a control terminal , the precharge terminal is used to charge the bit line of the single-column structure of the read unit, the word line terminal is used to select the unit to be read, and the control terminal is used to control the output of the bit line of the single-column structure of the read unit line signal; the output bit lines of the single-column structure of the N read units are connected, and the output sense amplifier of the read unit reads the average current generated by the discharge of the single-column structure of the N read units as the read timing. The device generates read timing by using multiple read units in a single-column structure of N read units, which reduces the influence of process fluctuations on the read timing, and makes the read timing approach the time required for reading, The waste of reading time is reduced, and the power consumption of reading the memory is also reduced.

Description

technical field [0001] The present application relates to the field of semiconductors, and in particular to a device for generating read timing. Background technique [0002] With the continuous shrinking of the process size of the integrated circuit, the impact of process fluctuation on the reading speed and power consumption of the memory is also increasing. When the traditional memory reads the data of the storage unit, the external input enable signal needs to be transmitted to the enable terminal of the sense amplifier after passing through the inverter chain. However, due to the influence of the fluctuation of the integrated circuit process, the delay of the inverter chain will occur Deviations are likely to change the reading timing of the memory storage units, which can lead to waste of reading time and increase reading power consumption. [0003] Based on this, the industry urgently needs to provide a device for generating read timings to avoid waste of read time a...

AI Technical Summary

Problems solved by technology

When the traditional memory reads the data of the storage unit, the external input enable signal needs to be transmitted to the enable terminal of the sense amplifier after passing through the inverter chain. However, due to the influence of the fluctuation of the integrated circuit process, the delay of the inverter chain will occur Deviation, it is very likely that the reading timing of the memory storage unit will change, so that it can lead to a waste of reading time, and also increase the reading power consumption

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