PCB processing method capable of avoiding layer deviation after lamination
A technology of PCB board and processing method, which is applied in the field of PCB board processing to avoid layer deviation after lamination, and can solve problems such as different expansion and contraction coefficients, inability to rivet, layer deviation, etc.
Active Publication Date: 2019-12-03
VICTORY GIANT TECH HUIZHOU CO LTD
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Problems solved by technology
[0005] In order to solve the problem that the substrates of different thicknesses and different types of materials have different expansion and contraction coefficients during lamination, resulting in the phenomenon of layer deviation, and the problem that they cannot be riveted after lamination, the present invention provides a PCB board that avoids lamination after lamination processing methods
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[0021] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0022] A PCB board processing method for avoiding layer deviation after lamination, comprising the following steps:
[0023] S1: Set rivet holes 2, layer deviation detection ring 3 and expansion and contraction detection pad 4 on each substrate without expansion and contraction pre-positioning. The positions of the detection pads 4 on each layer of the substrate also correspond to each other. The rivet hole 2, the layer deviation detection ring 3 and the expansion and contraction detection pad 4 are not pre-positioned, that is, they are set according to a ratio of 1:1;
[0024] The target 5 is set on each substrate according to the preset expansion and contraction value, and the inner layer circuit pattern is also pre-released according to the preset expansion and contraction value, and the position of the target 5 of each layer is preset to correspond ...
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The invention discloses a PCB processing method capable of avoiding layer deviation after lamination. The method comprises steps that S1, rivet holes, layer deviation detection rings and expansion andshrinkage detection bonding pads are arranged on all substrates without expansion and shrinkage pre-placement; targets and inner-layer circuit patterns are set on the substrates according to a presetexpansion and shrinkage value; and S2, after the multilayer substrates are riveted, whether a layer deviation phenomenon occurs or not is detected through the layer deviation detection rings, if yes,the next step is performed, and if not, the multilayer substrates are laminated; S3, the targets of various layers are detected through X-RAR equipment, if the targets of the layers are completely overlapped or deviation is within a preset value, the multilayer substrates are laminated, and if deviation is beyond the preset value, the next step is performed; and S4, expansion and shrinkage valuesof substrates are detected by measuring the expansion and shrinkage detection bonding pads, measured data of the layers are compared, the wrong expansion and shrinkage pre-placement values of the corresponding substrates are corrected, and the substrates are re-manufactured. The method is advantaged in that the PCB processed by the method can avoid phenomena of layer deviation and plate bending,and the method is suitable for batch production.
Description
technical field [0001] The invention relates to the field of PCB boards, in particular to a PCB board processing method for avoiding layer deviation after lamination. Background technique [0002] Human society's huge demand for information and data transmission drives the continuous development of communication technology. Every upgrade of mobile communication corresponds to an increase of about 10 times in the downlink rate. As one of the key technologies of 5G, the large-scale antenna technology deploys dozens or even hundreds of antenna arrays in the base station, and uses beamforming technology to construct different beams facing multiple target customers and effectively reduce the interference between each beam. Interference can effectively utilize precious and scarce frequency band resources and increase network capacity dozens of times. [0003] 5G large-scale antenna system structure, including dense radiation array, power division network, coupling calibration net...
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Login to View More IPC IPC(8): H05K3/46
CPCH05K3/4638H05K2203/166
Inventor 张亚锋何艳球蒋华钟招娣张永谋叶锦群张宏
Owner VICTORY GIANT TECH HUIZHOU CO LTD