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A press-fit method for preventing layer deviation of false laminates

A layer and uniform technology, applied in the field of lamination to prevent false layer deviation, can solve problems such as layer deviation, and achieve the effect of avoiding layer deviation and uniform pressure

Active Publication Date: 2020-03-24
JIANGMEN SUNTAK CIRCUIT TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention aims at the problem that the lamination method of the existing false laminates easily leads to layer deviation, and provides a lamination method for preventing the lamination deviation of the false laminates, which can completely avoid the problem of layer deviation caused by the lamination process

Method used

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  • A press-fit method for preventing layer deviation of false laminates
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  • A press-fit method for preventing layer deviation of false laminates

Examples

Experimental program
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Embodiment

[0025] This embodiment provides a lamination method for preventing the layer deviation of false laminates, including the following steps:

[0026] (1) Make a cushion layer

[0027] Take 5 pieces of kraft paper and stack them together to form a buffer layer, the thickness of the buffer layer is greater than the height of the rivets protruding from the surface of the superimposed structure. Then drill through holes along the periphery of the buffer layer on the buffer layer to make accommodating holes, thereby making a cushion pad; and when drilling, drill three accommodating holes along the two long sides of the buffer layer, Drill a receiving hole on each side. Cushion layer 10 such as figure 2 Shown, 11 is accommodating hole.

[0028] The positions of the receiving holes in the cushion layer correspond to the positions of the rivets in the superimposed structure one by one, and the diameter of the receiving hole is larger than the rivet cap of the corresponding rivet or t...

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PUM

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Abstract

The invention relates to the technical field of circuit board production, in particular to a pressing method for preventing layer deviation of false laminates. In the present invention, a layer of buffer cushion layer is respectively laid on the upper and lower sides of the superimposed structure to separate it from the steel plate, and the rivet caps or rivets protruding from the superimposed structure are accommodated in the corresponding accommodation holes on the cushion layer, so that the pressing During the process, the upper and lower positions of the rivets are elevated. No matter how much pressure is applied during pressing, the rivets will never be able to touch the steel plate and will not lift up the steel plate, thus ensuring that the superimposed structure is evenly pressed by the steel plate, and avoiding any damage caused during the pressing process. The superimposed structure is not uniformly stressed and the prepreg is heated and melted with fluidity, which leads to the problem of layer deviation. By pressing the superimposed structure to form a false laminate through the method of the invention, the problem of layer deviation caused by the pressing process can be completely avoided.

Description

technical field [0001] The invention relates to the technical field of circuit board production, in particular to a pressing method for preventing layer deviation of false laminates. Background technique [0002] Printed circuit board is also called circuit board (PCB, Printed Circuit Board). The production of circuit boards includes two links of circuit design and manufacturing. The manufacture of circuit boards is based on the previous circuit design. The manufacturing process is generally as follows: according to the design requirements, the inner core board is cut into the required size in the cutting process→ Lay film on the inner core board → use the inner layer film to expose in position → develop and remove the uncured film to form an inner layer pattern → etch the copper layer not covered by the film on the inner core board to form the inner layer circuit → fade the film → Stack the inner core boards in a certain order and press them together at high temperature to...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/46
CPCH05K3/4611
Inventor 欧阳戴勇杨长锋杨润伍
Owner JIANGMEN SUNTAK CIRCUIT TECH