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Array substrate and display panel

A technology of array substrate and display area, which is applied to electrical components, electric solid-state devices, circuits, etc., can solve problems such as electrostatic damage and display panel failure, and achieve the effect of preventing damage.

Active Publication Date: 2021-02-23
XIAMEN TIANMA MICRO ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The longer the metal wire or polysilicon, the more static charges will be collected, and the higher the voltage will be. Generally, the length of the gate metal wire in the array substrate is longer, and the accumulated static charge is also the most. Before the shift register circuit is connected, the static charge on the gate metal line may have the risk of electrostatic damage to the electronic devices in the shift register circuit or the electronic devices on the gate metal line, resulting in the failure of the display panel

Method used

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Embodiment Construction

[0026] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangements of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

[0027] The following description of at least one exemplary embodiment is merely illustrative in nature and in no way taken as limiting the invention, its application or uses.

[0028] Techniques, methods and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods and devices should be considered part of the description.

[0029] In all examples shown and discussed herein, any specific values ​​should be construed as exemplary only, and not as limitations. Therefore, other instances of the exemplary embodiment may have dif...

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Abstract

The invention discloses an array substrate and a display panel; the array substrate comprises a display area and a non-display area, and the non-display area comprises a shift register circuit; the array substrate comprises an underlayer substrate, and a first insulating layer, a first metal layer, a second insulating layer, a second metal layer, a third insulating layer and a third metal layer which are sequentially positioned on one side of the underlayer substrate, wherein the first metal layer comprises a gate line, the gate line comprises a first part and a second part, a first interval is formed between the first part and the second part of the orthographic projection of the plane where the underlayer substrate is located, and the second part is electrically connected with the shiftregister circuit; the array substrate comprises a first resistor, the two ends of the first resistor are electrically connected with the first part and the second part respectively, and the first resistor is located on the second metal layer or the third metal layer; the first insulating layer is provided with a second resistor, and two ends of the second resistor are electrically connected with the first part and the second part respectively; the resistance value of the second resistor is larger than that of the first resistor. According to the invention, the electrostatic protection capability of the shift register circuit in the array substrate is enhanced.

Description

technical field [0001] The present invention relates to the field of display technology, and more specifically, to an array substrate and a display panel. Background technique [0002] The display panel includes an array substrate. During the production process of the array substrate, many conductors such as metal wires or polysilicon (polysilicon) will be made. These metal wires or polysilicon will accumulate static charges (such as charged particles generated by plasma etching) and cause the potential to rise. . The longer the metal wire or polysilicon, the more static charges will be collected, and the higher the voltage will be. Generally, the length of the gate metal wire in the array substrate is longer, and the accumulated static charge is also the most. Before the shift register circuit is connected, the static charge on the gate metal line may have the risk of electrostatic damage to the electronic devices in the shift register circuit or the electronic devices on ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/522H01L23/60
CPCH01L23/5228H01L23/60
Inventor 郭凡张孟梓淦君君
Owner XIAMEN TIANMA MICRO ELECTRONICS
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