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Memory management unit and management method thereof

A technology of memory management unit and memory, which is applied in the computer field to achieve the effect of reducing TLB miss and improving performance

Active Publication Date: 2020-03-10
CAMBRICON TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For traditional TLB modules, because streaming application data is usually only accessed once, TLB misses often occur. Every time a TLB miss needs to find the relevant address translation page from the memory and update the TLB module, therefore, for streaming application, the traditional TLB module cannot improve the performance of data access very well

Method used

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  • Memory management unit and management method thereof
  • Memory management unit and management method thereof
  • Memory management unit and management method thereof

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specific Embodiment 1

[0039] According to an embodiment of the present invention, the TLB device supporting multiple data streams can be used in related applications of artificial neural networks. For artificial neural networks, there are generally four data streams such as weight, input, output and partial sum. According to practical applications Other different data streams can also be set as required.

[0040] figure 1 It is an example block diagram of an overall flow of a device according to an embodiment of the present invention. The memory management unit in this embodiment of the present application may include a control unit and k TLB modules set corresponding to k data streams of the stream application to be processed, where k may be a positive integer. Wherein, each TLB module stores consecutive page entries, and each page entry includes a one-to-one correspondence between a page and a page frame, that is, there is a mapping relationship between a page and a page frame.

[0041] like f...

specific Embodiment 2

[0052] According to an embodiment of the present invention, the TLB device supporting multiple data streams can be used in related streaming applications of machine learning, such as natural speech processing, handwriting recognition, face recognition and other related applications. It is assumed that there are k data in this embodiment stream, the size of k depends on the requirements of different applications.

[0053] figure 1 It is an example block diagram of an overall flow of a device according to an embodiment of the present invention. For streaming applications with k data streams, therefore, the number of TLB modules in the example block diagram can be set to k, and each TLB module corresponds to one data stream. Wherein, k can be a positive integer. Wherein, each TLB module stores consecutive page entries, and each page entry includes a one-to-one correspondence between a page and a page frame, that is, there is a mapping relationship between a page and a page fram...

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Abstract

The invention discloses a TLB device supporting multiple data streams and an updating method of a TLB module. The device comprises a control unit which is used for setting k TLB modules correspondingto k data streams of a streaming application to be processed, each TLB module is provided with a page and a page frame which are in one-to-one correspondence, and conversion from a logic address to aphysical address is completed through a mapping relationship between the page and the page frame, wherein k is a natural number. According to the device and the method provided by the invention, aiming at the characteristics of the streaming application data stream, the TLB miss condition in the conversion process of the logic address and the physical address can be greatly reduced, so that the frequency of accessing the memory is reduced, and the data access performance is greatly improved.

Description

technical field [0001] The present invention relates to the technical field of computers, and more specifically relates to a memory management unit and a management method thereof. Background technique [0002] The emergence of the Memory Management Unit (MMU), through the mapping of logical addresses to physical addresses, makes the total size of program data and stacks exceed the size of physical memory, and the page table of MMU, that is, logical addresses and physical addresses The translation table, stored in memory. Since the conversion from the logical address to the physical address requires multiple memory accesses, which greatly reduces the performance of data access, a translation lookaside buffer (TLB) module appears. The TLB module stores a part of the page entries in the page table. When the data processing device sends a logical address, the MMU first accesses the TLB module. If the TLB module contains a page that can convert this logical address, that is, a ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/1027G06F12/1009
CPCG06F12/1009G06F12/1027G06F12/1036G06F2212/654G06F2212/657G06F2212/684G06F2212/1021G06F12/0848G06N3/063G06F2212/68G06F2212/7201G06N3/02
Inventor 不公告发明人
Owner CAMBRICON TECH CO LTD