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Embedded source or drain region of transistor with laterally extended portion

A technology of extensions and regions, applied in the field of embedded source or drain regions, can solve problems such as device performance inhomogeneity

Pending Publication Date: 2020-06-05
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when grooves are formed in the body of a FET where the stressor material is to be grown, the profile of the groove depends on the loading effects of adjacent geometries (which will vary from FET to FET), resulting in non-uniformity in device performance

Method used

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  • Embedded source or drain region of transistor with laterally extended portion
  • Embedded source or drain region of transistor with laterally extended portion
  • Embedded source or drain region of transistor with laterally extended portion

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Embodiment Construction

[0039] Embodiments or examples of the present invention shown in the drawings will now be described using specific language. It should be understood, however, that no limitation of the scope of the invention is intended. Any alterations and modifications in the described embodiments, and any further applications of the principles described in this document are believed to occur to those of ordinary skill in the art to which the invention pertains. Reference numerals may be repeated throughout multiple embodiments, but even if the same reference numeral is shared, there is no requirement that features of one embodiment apply to another embodiment. It will be understood that when a feature is formed "over" another feature or substrate, intervening features may be present. Also, the terms "top" and "bottom" etc. are used to describe the relative distance of a feature with respect to the surface of a substrate where the feature is formed larger or smaller, respectively, above the...

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Abstract

In some embodiments, in a method, a body structure with a gate structure configured thereon is provided. The gate structure comprises a gate side wall traversing the body structure. A spacer is formedover the gate side wall. A first recess is formed in the body structure. The first recess is formed beside the spacer and extending laterally under the spacer. A recess extension is formed under thefirst recess to extend a vertical depth of the first recess. Stressor material with a lattice constant different from that of the body structure is grown such that the extended first recess is filled.The invention also provides an embedded source or a drain region of a transistor with a laterally extended portion.

Description

[0001] This application is a divisional application of the patent application for invention with the application number 201410352654.0 filed on July 23, 2014, entitled "Embedded Source or Drain Region of Transistor with Laterally Extended Part". technical field [0002] The present invention generally relates to embedded source or drain regions of transistors having lateral extensions. Background technique [0003] A field effect transistor (FET) introduced with mechanical stress applied to the channel region has enhanced drive strength due to increased carrier mobility in the channel region. In some approaches, source and drain regions on opposite sides of a gate include stressor regions embedded in a bulk structure in a FET. A lattice mismatch between the material of the channel region and the material of the embedded stressor region results in mechanical stress applied to the channel region. The magnitude of the mechanical stress depends on the distance from the embedded...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/66795H01L29/7848H01L29/7851H01L29/7842
Inventor 张哲诚陈建颖张永融
Owner TAIWAN SEMICON MFG CO LTD