Analog circuit fault positioning and parameter recognition method based on genetic algorithm

A technology of simulating circuit faults and genetic algorithms, which is applied in the field of fault location and parameter identification of analog circuits based on genetic algorithms, can solve problems such as the failure to reflect the possible range of faulty component parameters, and achieve the effect of fault diagnosis and faulty component parameter identification

Active Publication Date: 2020-06-09
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
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Problems solved by technology

A small number of parameter identification have also been studied, and the current parameter identification only gives a specific diagnostic result, which is close to the real parameter of the component within a certain range.
Under the influence of tolerance, the analog circuit can get the same output with different component parameter combinations, and the specific diagnosis result obtained by identification can only reflect one possibility, but cannot reflect the possible range of faulty component parameters.

Method used

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  • Analog circuit fault positioning and parameter recognition method based on genetic algorithm
  • Analog circuit fault positioning and parameter recognition method based on genetic algorithm
  • Analog circuit fault positioning and parameter recognition method based on genetic algorithm

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Embodiment

[0074] In order to better illustrate the technical effects of the present invention, a second-order Thomas analog filter circuit is used as an example to illustrate the present invention. image 3 is a structural diagram of the second-order Thomas analog filter circuit in this embodiment. Such as image 3 As shown, the second-order Thomas analog filter circuit in this embodiment takes V out As a measuring point, its transfer function is:

[0075]

[0076] This embodiment adopts the method in the patent titled "A Method for Identifying Fuzzy Groups of Analog Circuits" and the patent number is "20141033627.7", and conducts fuzzy group analysis based on the circle model, and obtains the fuzzy group situation at this measuring point as: { R 1}, {R 2}, {R 3 ,C 1}, {R 4 , R 5 , R 6 ,C 2}, the faults of the internal components of the fuzzy group cannot be distinguished, and the faults between the fuzzy groups can be distinguished theoretically. So take R 1 , R 2 , R 3...

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Abstract

The invention discloses an analog circuit fault positioning and parameter recognition method based on a genetic algorithm. Acquiring a transmission function of the measuring point; analyzing fuzzy group information of the analog circuit; the method comprises the following steps: determining a representative fault element of each fuzzy group, when an analog circuit has a fault, firstly obtaining acurrent output, then determining a fault element parameter value vector corresponding to the current output by utilizing a genetic algorithm so as to locate the representative fault element with the fault, and then determining a parameter value range of the representative fault element based on the genetic algorithm. According to the invention, fault diagnosis and fault element parameter recognition of the analog circuit can be effectively realized.

Description

technical field [0001] The invention belongs to the technical field of fault diagnosis of analog circuits, and more specifically relates to a method for fault location and parameter identification of analog circuits based on a genetic algorithm. Background technique [0002] With the rapid development of electronic technology, the volume of various electronic devices and chips has been rapidly reduced, but the fault diagnosis technology, especially the fault diagnosis technology of the analog part in electronic devices and chips, has not kept up with the speed of development. Traditional analog circuit fault diagnosis can be divided into pre-test diagnosis (simulation-before-test, SBT) and post-test diagnosis (simulation after the test, SAT). SBT is to simulate a large number of analog circuits before testing to extract fault features of analog circuits to establish a fault dictionary, or to classify fault features through classification algorithms such as neural networks an...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/12G01R31/316
CPCG06N3/126G01R31/316Y04S10/52
Inventor 杨成林陈钇任刘震周秀云
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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