An apparatus and method for handling write operations

Abstract

An apparatus and method are provided for handling write operations. The apparatus has a first processing device for executing a sequence of instructions, where the sequence comprises at least one instruction to activate a software protocol to establish an ownership right for writing data to a first memory region, and at least one write instruction executed following establishment of the ownershipright, in order to perform one or more write operations to output write data for storage in at least one memory location within the first memory region. A writeback cache associated with the first processing device is used to store the write data output during the one or more write operations. Coherency circuitry is coupled to the writeback cache and to at least one further cache associated with at least one further processing device. The first processing device is responsive to a trigger event to initiate a clean operation in order to cause the write data to be written from the writeback cache to memory. Further, the coherency circuitry is responsive to the clean operation to interact with the at least one further cache to implement a hardware protocol in order to make the write data visible to the at least one further processing device. This can provide a very efficient and cost effective mechanism for implementing cache coherency in certain systems.

Description

technical field [0001] The technology relates to apparatus and methods for handling write operations. Background technique [0002] A data processing system typically includes a plurality of processing devices that may perform data processing operations on data, and these various processing devices may be arranged to be able to access shared data in memory. Typically, processing devices will include one or more levels of local caches in which data manipulated by these processing devices can be cached to allow for faster than possible each time data needs to be fetched from memory to access the data. [0003] However, the presence of local caches may cause consistency problems, where it is possible for another processing device to access outdated data while the latest version is cached in the local cache of one processing device. [0004] While hardware cache coherency mechanisms have been developed for this scenario, these mechanisms can be relatively expensive to implemen...

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Problems solved by technology

[0003] However, the presence of local caches can cause consistency problems, where while the latest version is cached in the local cache of one processing device, another processing device may access outdated data

[0004] While hardware cache coherency mechanisms have been developed for this scenario, these mechanisms can be relatively expensive to implement in terms of hardware area and / or execution time

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