Data processing method, device and module and chip

Abstract

The invention provides a data processing method, device and module and a chip. The data processing module comprises: an AXI bus which is connected with a storage controller; the first AHB bus which isconnected with the processor; the AHB configuration unit which is connected with the first AHB bus to obtain a first instruction sent by the processor; the AXI read control unit which is connected with the AXI bus and is used for controlling the storage controller to read corresponding frame configuration parameters from an external memory according to the first instruction; the analysis unit which is connected with the AXI read control unit and is used for analyzing the frame configuration parameters into a plurality of first data packets based on an AHB protocol; and a second AHB bus, wherein one end of the second AHB bus is connected with the analysis unit, the other end of the second AHB bus is connected with the plurality of functional units, and the second AHB bus is used for transmitting the plurality of second data packets to the corresponding functional units. The instruction processing efficiency can be improved, and the working pressure of the processor is reduced.

Description

technical field [0001] The present application relates to the field of chip technology, in particular, to a data processing method, device, module and chip. Background technique [0002] The design of the IP (Intellectual Property) core of the chip usually uses the APB (Advanced Peripheral Bus) bus or the AHB (Advanced High Performance Bus) bus for parameter configuration, and the commonly used data bit width does not exceed 32 bits. [0003] In the prior art, the chip needs to issue an instruction and needs to be initiated by the processor. Every time the processor sends an instruction through the APB bus or AHB bus, a processor response is required, resulting in low processing efficiency for the instruction, and when the instruction is issued When there are many instructions, the workload pressure of the processor is greater. [0004] For the above problems, there is no effective technical solution at present. Contents of the invention [0005] The purpose of the embod...

AI Technical Summary

Problems solved by technology

[0003] In the prior art, the chip needs to issue instructions and needs to be initiated by the processor. Every time the processor sends an instruction through the APB bus or AHB bus, it needs to respond to the processor once, resulting in low processing efficiency for the instruction. When there are many instructions, the workload pressure of the processor is greater

[0004] For the above problems, there is no effective technical solution

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