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A method and apparatus for improving reliability of processor core

A processor core and reliability technology, applied in the fields of electrical digital data processing, instruments, and response error generation, etc., can solve problems such as the failure of the processor and the whole system to work normally, and achieve a convenient processing method and improve reliability. Effect

Active Publication Date: 2022-02-22
NAT UNIV OF DEFENSE TECH
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide a method and device for improving the reliability of the processor core, aiming at the problem that the memory bank error during the operation of the processor core may cause the processor and the whole system to fail to work normally. The invention can correct the errors in the storage body of the processor core as much as possible, and record and report these errors from multiple angles, thereby using multiple error handling methods to jointly improve the reliability of the processor core, and try to ensure that the processor core and the system are It still works fine after the error

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  • A method and apparatus for improving reliability of processor core
  • A method and apparatus for improving reliability of processor core
  • A method and apparatus for improving reliability of processor core

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Embodiment Construction

[0057] A method and device for improving processor core reliability of the present invention will be further described in detail below in conjunction with the accompanying drawings. The features and advantages of the present invention will become apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form, and are only used to briefly and intuitively assist in explaining the examples of the present invention.

[0058] Such as figure 1 As shown, the device for improving processor core reliability in this embodiment includes error discovery and correction logic, correctable error processing logic, error recording and reporting logic, and exception recording and reporting logic:

[0059] The error detection and correction logic is respectively implemented in L1-ICache, L1-DCache and L2-TLB, including: the logic for performing parity check on odd-numbered bits and even-numbered bits in the label storage array of L1-IC...

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Abstract

The invention discloses a method and a device for improving the reliability of a processor core. The device for improving the reliability of a processor core includes error discovery and correction logic, correctable error processing logic, error recording and reporting logic, abnormal recording and reporting Logic and methods include error discovery and handling related to address translation, error discovery and handling related to the index fetch process except address translation, error discovery and handling related to Load operations except address translation, error discovery and handling related to Store operations except address translation and processing, Snoop or Evict operation-related error discovery and processing steps. The present invention can correct the errors in the storage body of the processor core as much as possible, and record and report these errors from multiple angles, thereby using multiple error handling means to jointly improve the reliability of the processor core, and try to ensure that the processor core and the system are It can still work normally after encountering errors.

Description

technical field [0001] The invention relates to the field of processor design, in particular to a method and device for improving the reliability of a processor core. Background technique [0002] In modern processor designs, SRAM is often used to cache portions of data in order to improve performance. Among them, the first-level instruction cache, the first-level data cache, and the address translation cache have all become mandatory components in high-performance processor cores. However, as the number of transistors integrated in processors has increased, the environment in which these memories operate has become more complex. Electromagnetic interference, erratic currents, etc. can often cause transient or permanent errors in memory banks in the processor core. These errors will directly manifest as abnormal changes in some data, which will cause failures in applications or systems using these data. For application scenarios such as servers and automobiles, once there...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10
CPCG06F11/1076G06F11/1048G06F11/1064
Inventor 王俊辉邓全雷国庆郭辉郑重郭维隋兵才黄立波冯权友孙彩霞倪晓强王永文
Owner NAT UNIV OF DEFENSE TECH
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