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NANDFlash LUN self-organized read voltage sequence method

A technology for reading voltage and sequence, applied in the field of storage, can solve the problem that the voltage sequence cannot effectively correct errors, and achieve the effect of reducing the error rate of read operations, improving efficiency and reducing the number of read errors

Pending Publication Date: 2021-02-26
SHANDONG SINOCHIP SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method has a key analysis point that the test environment is different from the actual use environment. The voltage sequence found through the test environment may not be able to effectively correct errors in the actual use environment.

Method used

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  • NANDFlash LUN self-organized read voltage sequence method
  • NANDFlash LUN self-organized read voltage sequence method
  • NANDFlash LUN self-organized read voltage sequence method

Examples

Experimental program
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Embodiment 1

[0022] LUN is the smallest unit for executing operation instructions and reporting execution status in NAND Flash. Each LUN includes many blocks. Blocks in the same LUN have basically the same characteristics, that is, blocks in the same LUN can use the voltage value sequence searched by other blocks. .

[0023] When each influencing factor reaches a certain step threshold, a voltage value sequence search should be performed. The number of influencing factors determines the number of voltage value sequences, and the step threshold of the influencing factors determines the granularity of the voltage value sequence. Typical factors affecting NAND include wear times (PE Cycle), data retention time (Data Retention), temperature difference (Temperature Diff), read disturbance (Read Disturb), dwell time (Dwell Time), etc., and can also be added according to actual needs or delete.

[0024] When the block status inspection in NAND finds that the first block in a certain LUN is close...

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Abstract

The invention discloses an NANDFlash LUN self-organized read voltage sequence method, which comprises the following steps: searching a voltage value sequence once when each influence factor reaches acertain step length threshold value, searching an optimal read voltage value sequence of each Wordline group of a Block under the current environment condition when the first Block in a certain LUN isfound to be close to the influence factor step length threshold value during Block state inspection in an NAND, and storing the condition and the read voltage value sequence in a memory. When other Blocks in the LUN reach the influence factor step length threshold value, whether a read voltage value sequence under the influence factor step length threshold value condition exists or not is searched firstly, and if yes, the read voltage value sequence is directly used. According to the method, the optimal voltage sequence can be self-organized in each LUN of the NAND Flash according to the actual operation environment, the number of read errors and the read operation error rate are effectively reduced, and the SSD operation efficiency and the adaptability to different environments are greatly improved.

Description

technical field [0001] The invention relates to the field of storage, in particular to a method for self-organizing read voltage sequences of NAND Flash LUNs. Background technique [0002] During the use of NAND Flash, there will be many factors that affect the accuracy of read data, such as wear times (PE Cycle), data retention time (Data Retention), temperature (Temperature), read disturbance (Read Disturb), dwell time (Dwell Time) and so on. When disturbed by these factors, if you still use the default voltage of NAND Flash to read data, it is likely to cause a large number of errors and read failure. [0003] If you simulate the influence of various factors in the test environment, find out the voltage sequence that can read the data correctly under the influence factors, and then find the matching voltage sequence according to the influence factors in use and read it. However, this method has a key analysis point that the test environment is different from the actual ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/34G06F12/02
CPCG11C16/3404G06F12/0246Y02D10/00
Inventor 曹成
Owner SHANDONG SINOCHIP SEMICON
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