3D memory device and manufacturing method thereof

Abstract

The invention discloses a 3D memory device and a manufacturing method thereof. The memory device comprises: a substrate; a laminated structure, wherein the laminated structure is located on the substrate and comprises a plurality of gate conductors and a plurality of interlayer insulating layers which are alternately stacked; a channel hole, which penetrates through the laminated structure; a channel structure, which is positioned in the channel hole; and a filling layer, which covers the channel structure. The filling layer is formed through multiple times of deposition, and gas etching is carried out among multiple times of deposition processes, so the top of a cavity in the filling layer is located below the uppermost interlayer insulating layer in the laminated structure, the size of the cavity in the filling layer is further reduced, the height of a joint at the top of the cavity is reduced, and the thickness of the filling layer above the joint is increased; and thus, subsequentprocessing requirements are met, and the yield and reliability of the 3D memory device are improved.

Description

technical field [0001] The present invention relates to memory technology, and more particularly, to 3D memory devices and manufacturing methods thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory. The two main non-volatile flash memory technologies use NAND and NOR structures, respectively. Compared w...

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Problems solved by technology

However, in the prior art, in order to increase the storage capacity, the number of stacked layers in the stacked structure is increasing, resulting in an increase in thickness, which in turn causes an increase in the aspect ratio of the channel column, so that the filling layer fills the channel column When the core is affected, a seam will be generated at a higher position during the filling process, so that an unfilled airtight cavity will be form

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