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High-precision flash erasing and writing time obtaining device based on FPGA

An acquisition device and high-precision technology, applied in static memory, instruments, etc., can solve the problem of large error in erasing and writing time, and achieve the effect of improving test accuracy

Active Publication Date: 2021-03-19
XTX TECH INC
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  • Application Information

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Problems solved by technology

[0006] The purpose of the present invention is to provide a high-precision flash erasing time acquisition device based on FPGA, which aims to solve the problem that the obtained erasing time has a large error in the existing test method of directly detecting the flash erasing time through the MCU, which is not applicable Problems in high-precision and complex flash life testing

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  • High-precision flash erasing and writing time obtaining device based on FPGA

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Embodiment Construction

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all of them. The components of the embodiments of the application generally described and illustrated in the figures herein may be arranged and designed in a variety of different configurations. Accordingly, the following detailed description of the embodiments of the application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of the application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative efforts belong to the scope of protection of the present application.

[0028] It should ...

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Abstract

The invention discloses a high-precision flash erasing time acquisition device based on an FPGA, which is characterized in that in an operation test, after an expansion unit sends operation information to a flash to be tested, the expansion unit starts counting, and each system clock counts once; meanwhile, the expansion unit sends a state register reading instruction to the flash to be tested until the expansion unit detects that the state register WIP of the flash to be tested is equal to 0, the erasing time of the flash to be tested is obtained by multiplying the count by the clock period of the FPGA chip, the period of the FPGA clock is in the magnitude of 10 ns, and compared with the MCU in the magnitude of us, the erasing time of the flash to be tested is tested by using FPGA, and test precision is greatly improved.

Description

technical field [0001] The invention relates to a flash testing device, in particular to an FPGA-based high-precision flash erasing time acquisition device. Background technique [0002] NOR FLASH with high reliability, fast reading, and executable code, also known as code-based memory chip, has been widely used under the impetus of emerging technologies such as big data, artificial intelligence, Internet of Things, and cloud computing. With the increasing market share of flash and the increasing demand for data security, the performance of flash chips, especially the service life, has also been put forward higher requirements. An important evaluation index of service life is Nor flash erasing time. [0003] Erase and write time can evaluate the service life of Nor flash. If the erasing time is stable and close to the typical value within 100,000 erasing operations, it means that the performance of the chip is good during the 100,000 erasing life, but if it is unstable or ...

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Application Information

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IPC IPC(8): G11C29/56
CPCG11C29/56
Inventor 蒋双泉黎永健刘佳庆
Owner XTX TECH INC
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