Memory programming operation method and device

An operation method and a technology of an operation device, which are applied in the field of memory, can solve problems such as program interference, migration, and the inability to effectively reduce channel charge density, and achieve the effects of reducing electron density and program interference

Active Publication Date: 2022-05-20
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0004] However, as the number of stacked layers in 3D NAND memory increases, the length of the channel becomes longer and longer, so that the electrons in the channel farther away from the source terminal are subjected to a limited electric field force and cannot efficiently migrate to the source terminal. As a result, the channel charge density cannot be effectively reduced in the pre-charging stage, and the programming disturbance is serious.

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  • Memory programming operation method and device
  • Memory programming operation method and device
  • Memory programming operation method and device

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Embodiment Construction

[0057] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is particularly pointed out that the following examples are only used to illustrate the present invention, but do not limit the scope of the present invention. Likewise, the following embodiments are only some rather than all embodiments of the present invention, and all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

[0058] In addition, the directional terms mentioned in the present invention, such as [up], [down], [front], [rear], [left], [right], [inner], [outer], [side], etc., only is the direction of reference to the attached drawings. Therefore, the directional terms used are for describing and understanding the present invention, not for limiting the present invention. In the various figures, structurally similar elements are designated ...

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Abstract

The invention relates to a programming operation method and device for a memory. The memory includes a first input terminal, a first storage string, a second storage string and a second input terminal sequentially arranged in a preset direction. The first storage string includes a series A plurality of first memory cells, the second memory string includes a plurality of second memory cells connected in series, the programming operation method includes: precharging the programming operation, including providing a first preset voltage to the first input terminal, and charging the first The gate layer of the memory cell provides a second preset voltage to precharge the channel in the first memory string; perform a programming operation to program the second memory cell, thereby performing a programming operation on the second memory string When , the charge density of the channel can be effectively reduced in the pre-charging stage of the programming operation, thereby reducing programming disturb.

Description

【Technical field】 [0001] The present invention relates to the technical field of memory, and in particular, to a method and device for programming a memory. 【Background technique】 [0002] As technology evolves, the semiconductor industry is constantly looking for new production methods that allow for a greater number of memory cells per memory die in a memory device. Among them, 3D NAND memory has become a relatively cutting-edge 3D memory technology with great development potential due to its advantages of high storage density and low cost. [0003] At present, when a 3D NAND memory is programmed, a larger forward bias voltage is usually provided to the source terminal located at the source side of the channel during the precharge stage of the programming operation to attract electrons in the channel to migrate to the source terminal and eventually absorbed by the source terminal, thereby reducing the channel charge density. [0004] However, with the increase in the num...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C5/14G11C16/10H01L27/11529H01L27/11551H01L27/1157H01L27/11578
CPCG11C5/147G11C16/10H10B41/41H10B41/20H10B43/35H10B43/20
Inventor 李楷威游开开贾建权李姗张安
Owner YANGTZE MEMORY TECH CO LTD
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