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Method for direct memory access (DMA) to access data

A technology for accessing memory and accessing data, which is applied in electrical digital data processing, memory address/allocation/relocation, instruments, etc. It can solve problems such as increasing hardware power consumption, affecting high-speed interface transceiver performance, and time-consuming cache maintenance.

Pending Publication Date: 2021-08-13
BLACK SESAME TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this way, each receiving and sending will involve the application and release of the data buffer memory, affecting the speed of receiving and sending, and increasing the power consumption of the hardware
At the same time, there is also the problem of cache consistency. It is necessary to call the API to refresh or invalidate the cache cache, which makes cache cache maintenance time-consuming, affects the performance of high-speed interface transmission and reception, and increases hardware power consumption.

Method used

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  • Method for direct memory access (DMA) to access data
  • Method for direct memory access (DMA) to access data
  • Method for direct memory access (DMA) to access data

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Embodiment Construction

[0017] In order to make the above objects, features and advantages of the present invention more obvious and comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar improvements without departing from the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0018] figure 1 It is a structural diagram of a management system for DMA accessing memory during high-speed interface data transmission according to an example of the present application. Controller 10, controller 12, and controller 14 are each communicatively connected ...

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Abstract

The invention provides an improved method for direct memory access (DMA) to access data, which comprises the following steps of: when a controller corresponding to a high-speed interface is initialized, allocating m direct memory access (DMA) hardware descriptors for the controller, and allocating n data buffer units for a slave data buffer part of the controller; constructing the software descriptor of the buffer part into a two-dimensional array enabling each row of the software descriptor to point to one buffer unit, wherein the value of a first subscript of each array item in the array ranges from 0 to n-1, and the value of a second subscript of each array item ranges from 0 to 1; respectively storing the virtual address and the physical address of the same buffer unit in a column of the two-dimensional array of the corresponding software descriptor; creating an index to establish a guidance relationship between the buffer unit and the software descriptor, the index including an idle index and a scheduling index; and achieving access of the CPU and the DMA to the memory in the data transmission process of the high-speed interface at least based on the index, the hardware descriptor and the software descriptor.

Description

technical field [0001] The present invention relates to direct memory access DMA technology, more specifically, relates to the technology of DMA accessing data. Background technique [0002] High-speed interfaces such as PCIe, USB, and Ethernet basically use DMA combined with interrupt mode when accessing memory during the communication sending and receiving process, and traditional streaming DMA mapping is used for data buffering. In this way, each receiving and sending will involve the application and release of the data buffer memory, which affects the speed of receiving and sending, and increases the power consumption of the hardware. At the same time, there is also the problem of cache consistency. It is necessary to call the API to refresh or invalidate the cache cache, which makes cache cache maintenance time-consuming, affects the performance of high-speed interface transmission and reception, and increases hardware power consumption. Therefore, it is necessary to p...

Claims

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Application Information

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IPC IPC(8): G06F13/28G06F13/16G06F12/06
CPCG06F13/28G06F13/1673G06F12/06Y02D10/00
Inventor 廖兴
Owner BLACK SESAME TECH CO LTD
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