Method for improving electrical testing efficiency of PCB

A technology of efficiency and electrical testing, applied in printed circuit testing, electronic circuit testing, etc., can solve problems such as deep pad printing, achieve low cost, improve efficiency, and avoid secondary testing effects

Pending Publication Date: 2021-10-08
广东喜珍电路科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The existing multi-SET testing method has the following problems: in the case of unqualified test, the SET qualified products cannot be sucked into the qualified product area, and the SET unqualified products can be sucked into the unqualified product area, and at the same time mixed into the PASS board Re-testing is still required, and one more repeated test may also cause quality problems such as too deep pad printing

Method used

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  • Method for improving electrical testing efficiency of PCB
  • Method for improving electrical testing efficiency of PCB

Examples

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Embodiment

[0037] A method for improving PCB electrical testing efficiency, characterized in that, comprising a testing mechanism 10, comprising the following steps:

[0038] S1. Test preparation, the operator puts the board to be tested into the loading table, and puts two SET or multi-SET circuit boards 20 together according to the direction of the test mold;

[0039] S2. The test is carried out, and the feeding mechanism absorbs two more SET circuit boards and puts them into the test mold;

[0040] The step S2 includes two ways of S21 or S22:

[0041] S21. Multi-SET tests all the PASS, then the controller in the test module sends a signal to all the receiving nozzles, and the receiving mechanism sucks all the SET boards into the PASS area;

[0042] S22. Multi-SET test part PASS, then the controller in the test module sends a signal to the corresponding material receiving nozzle, and the material receiving mechanism sucks the PASS board into the PASS area, and puts the SHORT board or ...

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Abstract

The invention provides a method for improving the electrical testing efficiency of a PCB, which comprises a testing mechanism and comprises the following steps: S1, testing preparation: an operator puts a board to be tested on a feeding table and splices two or more SET circuit boards together according to the direction of a testing mold; S2, testing: a feeding mechanism sucks more than two SET circuit boards and puts the SET circuit boards into a testing mold; and S3, repeating the next test. According to the invention, one or more groups of material receiving suction nozzles and independent electromagnetic valve control are added, when a test is carried out, if a good plate and a bad plate exist, a controller independently switches on and off one group of electromagnetic valves, the good plate is sucked into a PASS material receiving area, and the bad plate is sucked into an SHORT material receiving area or an OPEN material receiving area according to the test condition. Meanwhile, in combination with visual identification, the discharging vehicle-mounted devices in different colors represent qualified or unqualified products, the discharging tables in different positions represent qualified or unqualified products, the discharging vehicle-mounted devices are easy to achieve, only the visual identification module needs to be fixed to the ceiling, existing equipment layout is not affected, implementation is convenient, and plate mixing can be effectively prevented.

Description

technical field [0001] The invention belongs to the technical field of PCB, and in particular relates to a method for improving the efficiency of PCB electric measurement. Background technique [0002] In the testing process of the printed circuit board industry, the circuit boards divided into shipping sizes (SET) are generally energized with test probes on each circuit to test whether there are open and short circuits in the circuit. The test principles used in the industry are basically the same. To improve the test efficiency, the method of testing multiple SETs at one time is generally used, that is, the original test method tests 1 SET at a time, and the current test 2 SETs at a time, the efficiency can be doubled. This method directly improves the test efficiency, but the multi-SET test cannot pick out the good products that fail the test, which invisibly reduces the PASS rate once. For example: there are 100SET boards, of which 5SETs actually have open and short circ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
CPCG01R31/2808
Inventor 程文君刘露易磊
Owner 广东喜珍电路科技有限公司
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