Relay protection device architecture based on SOC chips
A relay protection device and chip technology, which is applied to emergency protection circuit devices, circuit devices, parts of emergency protection devices, etc., can solve problems such as refusal to operate and malfunction
Pending Publication Date: 2021-11-19
NR ELECTRIC CO LTD +1
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Problems solved by technology
Once the data processing module of the FPGA process layer is abnormal, it will cause the protection and startup to receive wrong data at the same time, which will cause the risk of malfunction or refusal
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[0018] The technical solutions of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0019] Such as figure 1 Shown is a high-reliability architecture of relay protection devices based on SOC chips. Including: two SOC chips, two independent ADC sampling modules, two independent process layer communication networks, two optical modules and redundant export relays.
[0020] a. 2 SOC chips.
[0021] Each of the SOC chips is configured with a CPU and an FPGA. Among them: one SOC chip has a built-in protection CPU and a main FPGA, and the independent process layer communication network communicating with it is the protection communication network; the other SOC chip has a built-in startup CPU and a slave FPGA, and an independent process layer communication network communicating with it To start the communication network. Each SOC chip is connected to one ADC sampling module respectively, and the analog quantity is sampled thr...
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The invention discloses a relay protection device architecture based on SOC chips. The relay protection device architecture comprises two SOC chips, two paths of independent ADC sampling modules, two independent process layer communication networks, two paths of optical modules and a redundant exit relay. Each SOC chip is provided with a CPU (Central Processing Unit) and an FPGA (Field Programmable Gate Array); each SOC chip is connected with one ADC sampling module, and analog quantity sampling is carried out through the ADC sampling modules; a data transmission channel is arranged between the two SOC chips and is used for data transmission between the SOC chips; each SOC chip performs message interaction with one independent process layer communication network through one optical module; and each SOC chip respectively controls the action of one relay. According to the relay protection device architecture based on the SOC chips, redundancy mutual correction of links from analog quantity sampling, process layer communication, processor logic calculation to relay outlets is comprehensively covered.
Description
technical field [0001] The invention belongs to the field of electric power system relay protection, and relates to a high-reliability architecture of a relay protection device based on an SOC chip. Background technique [0002] As the core equipment of the power grid, the relay protection device is autonomously controllable and plays a key role in the safe and stable operation of the power grid. However, at present, the core chips of various relay protection devices in China generally rely on foreign imports. [0003] Currently, digital protection devices that support process-level communication generally adopt a dual-CPU architecture. One CPU is responsible for the protection logic, and the other CPU is responsible for the startup logic. The logic independence of protection and startup is realized from the hardware, and the system reliability is improved to a certain extent. However, there is only one module for processing communication network messages at the process lay...
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IPC IPC(8): H02H1/00
CPCH02H1/0092H02H1/0007H02H1/0061H02H1/0069
Inventor 赵青春陆金凤戴光武王玉龙李响周强
Owner NR ELECTRIC CO LTD