A separate computing device based on 6t-sram

A 6T-SRAM and computing device technology, applied in information storage, static memory, digital memory information, etc., can solve the problem of more single-bit calculations, and achieve the effect of improving calculation accuracy

Active Publication Date: 2022-02-22
中科南京智能技术研究院
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Traditional storage and calculation chips mostly use voltage or level for calculation, and there are many single-bit calculations

Method used

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  • A separate computing device based on 6t-sram
  • A separate computing device based on 6t-sram

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Embodiment Construction

[0019] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0020] The purpose of the present invention is to provide a separate calculation device based on 6T-SRAM, which improves the accuracy of calculation results.

[0021] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0022] figure 1 It is a structural schematic diagram...

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Abstract

The present invention relates to a separate computing device based on 6T-SRAM, comprising an array of storage and calculation units, the array of storage and calculation units includes storage and calculation units arranged in a matrix; the storage and calculation units include 6T-SRAM, a tube M7, a tube M8 and capacitors; in each storage unit, the gate of the tube M7 is connected to the weight storage point of the 6T-SRAM, the first pole of the tube M7 is connected to the input signal terminal, and the second pole of the tube M7 is connected to the first terminal of the capacitor and the read bit Line RBL, the second terminal of the capacitor is grounded, the gate of the tube M8 is connected to the control signal terminal, the first pole and the second pole of the tube M8 are connected to the read bit line RBL; the read bit lines RBL of the storage and calculation units of each column are connected in line . The invention improves the accuracy of calculation results.

Description

technical field [0001] The invention relates to the technical field of in-memory computing, in particular to a separate computing device based on 6T-SRAM. Background technique [0002] Deep Convolutional Neural Networks (DCNNs) are developing rapidly in fields such as artificial intelligence. With its gradual development, more and more issues such as size, efficiency, and energy consumption need to be considered. In the traditional calculation process, the weight is moved between the memory and the operation unit, which does not meet the requirements of low power consumption. In-memory computing (IMC) is increasingly attractive for DCNN acceleration. Traditional storage and calculation chips mostly use voltage or level for calculation, and there are many single-bit calculations. Contents of the invention [0003] The purpose of the present invention is to provide a separate calculation device based on 6T-SRAM, which improves the accuracy of calculation results. [0004]...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/413G11C11/419
CPCG11C11/419G11C11/413
Inventor 乔树山陶皓尚德龙周玉梅
Owner 中科南京智能技术研究院
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