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A driving adjustment circuit and electronic equipment

A technology for adjusting circuits and circuits, applied in the direction of eliminating voltage/current interference, improving reliability, etc., and can solve problems such as limiting the development of electronic equipment and inter-symbol interference

Active Publication Date: 2022-04-26
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the operating frequency is high, intersymbol interference is prone to occur during signal transmission, which limits the development of electronic equipment

Method used

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  • A driving adjustment circuit and electronic equipment
  • A driving adjustment circuit and electronic equipment
  • A driving adjustment circuit and electronic equipment

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Experimental program
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Embodiment Construction

[0036] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the specific embodiments described here are only used to explain the related application, not to limit the application. It should also be noted that, for the convenience of description, only the parts related to the relevant application are shown in the drawings.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of the present application, and are not intended to limit the present application.

[0038] In the following description, references to "some embodiments" describe a subset of all possible embodiments, but ...

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Abstract

Embodiments of the present application provide a drive adjustment circuit and electronic equipment. The drive adjustment circuit includes a first NOT module, a second NOT module, and a third NOT module connected in sequence, and the input terminal of the first NOT module and the output terminals of the third NOT gate module are connected to a signal terminal; wherein, the first NOT gate module is used to obtain the signal to be driven from the signal terminal, and perform a non-operation on the drive signal to obtain the first adjustment signal; The second NOT module is used to receive the first adjustment signal when the drive adjustment circuit is in the open state, and to perform a NOT operation on the first adjustment signal to obtain the second adjustment signal; the third NOT module is used to receive the first adjustment signal. 2. Adjust the signal, and perform voltage adjustment processing on the signal to be driven at the signal terminal according to the second adjustment signal. The drive adjustment circuit provided by the embodiment of the present application can improve the signal transmission speed.

Description

technical field [0001] The present application relates to the technical field of semiconductor memory, and in particular to a driving adjustment circuit and electronic equipment. Background technique [0002] With the development of industry, it is expected to further increase the operating speed of electronic equipment, that is, to increase the operating frequency of electronic equipment. In order to achieve this goal, the speed of signal transmission in electronic equipment must also be faster. However, when the operating frequency is high, intersymbol interference is likely to occur during signal transmission, which limits the development of electronic equipment. Contents of the invention [0003] The present application provides a drive adjustment circuit and electronic equipment, which can partially improve the problem of intersymbol interference and increase the speed of data transmission. [0004] In the first aspect, the embodiment of the present application prov...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/003
CPCH03K19/00361H04L25/03114H03K19/017G11C7/106G11C7/1084G11C7/02G11C29/022G11C29/028G11C11/4093G11C29/023G11C29/021G11C29/12005G11C7/10H03K3/037H03K19/20
Inventor 谷银川
Owner CHANGXIN MEMORY TECH INC