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Semiconductor device and manufacture thereof

A manufacturing method, semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problem of adhesive flow to the outside, generation of defects, coating thickness of insulating adhesive layer 104a Uneven etc.

Inactive Publication Date: 2004-03-31
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0012] The problem with the second conventional structure is that defects are generated during the manufacturing process because the semiconductor chip 102 and the interposer board 105a are insulated from each other only by the insulating adhesive layer 104a.
Even when the insulating adhesive is supplied in a constant amount, the coating thickness of the insulating adhesive layer 104a is uneven due to a slight pressure difference generated when the semiconductor chip 102 is bonded by the insulating adhesive layer 104a
Another problem is that the adhesive used may bleed to the outside

Method used

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  • Semiconductor device and manufacture thereof
  • Semiconductor device and manufacture thereof
  • Semiconductor device and manufacture thereof

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Embodiment Construction

[0046] The following will refer to the attached Figure 3A to 3C, Figure 4 , Figures 5A to 5D and Figure 6A to Figure 6E A semiconductor device and a method of manufacturing the same according to an embodiment of the present invention will be described.

[0047] For simplicity, some parts not essential to the present invention are simplified in the figures and differ from figure to figure. For example, the number of solder balls and the like are different in each figure.

[0048] The semiconductor device is generally indicated as 1, which includes a plug-in board 5 with a surface interconnect 7, a semiconductor chip 2 fixed on the surface interconnect 7, and an insulating layer 3. The insulating layer 3 includes a film, and the surface interconnect 7 and the semiconductor chip 2 are insulated from each other by this film.

[0049] First refer to Figure 3A to 3C and Figure 4 The semiconductor device 1 will be described. Various circuit components and their terminal...

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Abstract

Before a semiconductor chip (2) is mounted on package board (5), an insulating layer (3) is formed on the reverse side of the semiconductor chip (2) for preventing insulation failures. If the insulating layer (3) is formed by applying an insulating film, then the insulating layer (3) reliably achieves a predetermined thickness for reliable electric insulation and can easily be formed. The semiconductor chip (2) with the insulating layer (3) formed thereon is fixed to the package board (5) which has surface interconnections (7) by an insulating adhesive (adhesive layer 4). The semiconductor chip (2) and the surface interconnections (7) are insulated from each other by the insulating layer (3). Therefore, the adhesive may be used in a minimum quantity. Since the semiconductor chip (2) can be pressed under an increased pressure, the semiconductor chip (2) is reliably joined to the package board (5). Surface irregularities existing on the surface of the package board (5) due to the surface interconnections (7) are filled up with and covered by the adhesive, leaving no gaps on the surface of the package board (5).

Description

technical field [0001] The present invention relates to semiconductor devices and methods of manufacturing such semiconductor devices, and more particularly, to semiconductor devices mounted with semiconductor chips and methods of manufacturing such semiconductor devices. Background technique [0002] Usually, the semiconductor chip is mounted on the plug-in board of the semiconductor device, and the environment in which it is used and the difficulty of mounting on the plug-in board are taken into consideration. There are various types of interposer designs to suit different sizes of semiconductor chips and the number of terminals. If the semiconductor chip has a plurality of terminals, it is generally customary to use a BGA (Ball Grid Array) type package, the terminals of which are arranged in a grid pattern on the lower surface of the package, or to use an LGA (Land Grid Array) type package. [0003] in the attached picture figure 1 Partially showing a cross-sectional vi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/12H01L21/52H01L21/58H01L21/60H01L23/14H01L23/28H01L23/498
CPCH01L2924/07802H01L2924/01006H01L24/27H01L2924/3511H01L24/32H01L2224/48227H01L2924/01004H01L2924/15311H01L2924/01082H01L2224/92247H01L2224/7565H01L2224/92H01L2224/48091H01L2224/16237H01L2224/32057H01L24/82H01L2224/83385H01L2924/01005H01L2924/01033H01L23/49816H01L2924/01079H01L2924/12041H01L2224/83192H01L2224/32225H01L2924/014H01L24/18H01L2224/48228H01L24/48H01L24/29H01L2224/73265H01L2224/7665H01L2224/8385H01L2224/2919H01L2924/01029H01L2924/0665H01L24/83H01L2224/18H01L24/73H01L2224/05026H01L2224/05571H01L2224/05573H01L2224/05147H01L2224/05155H01L2224/05644H01L2924/181H01L2924/00014H01L2224/06131H01L24/05H01L2924/00H01L2924/00012H01L2224/45099H01L2224/45015H01L2924/207H01L23/28
Inventor 松浦义宏
Owner RENESAS ELECTRONICS CORP