Frame synchronization system and method for shortening total time length of calibration and synchronization

A frame synchronization, total duration technology, applied in time division multiplexing systems, electrical components, multiplexing communications, etc., can solve the problems of increasing overall power consumption, reducing calibration accuracy, etc. The effect of shortening the total time and saving hardware resources

Active Publication Date: 2022-05-10
国芯科技(广州)有限公司
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Problems solved by technology

In order to achieve better receiving performance, the radio frequency receiver must complete one or more calibrations in a very short time before receiving useful signals, such as gain control (AGC), frequency offset calibration (frequency offset cancellation), DC calibration ( dc offset cancellation), etc. These calibrations must be performed every time you enter the receiving mode. Each calibration takes a certain amount of time to complet

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  • Frame synchronization system and method for shortening total time length of calibration and synchronization
  • Frame synchronization system and method for shortening total time length of calibration and synchronization
  • Frame synchronization system and method for shortening total time length of calibration and synchronization

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Embodiment Construction

[0022] Regular frame synchronization such as figure 1 As shown, the N-bit received data is sampled with the OS times oversampling clock, and moved into the shift register, and correlated with the N-bit synchronization code that is also OS times oversampled. If the correlation is higher than the threshold, the frame synchronization is successful. .

[0023] Since the synchronization code configured by the register is known and fixed, during the duration of a symbol, the oversampling clock is the same for all sampling values ​​of the same bit configured with the synchronization code, so there is no need to reserve NxOS bit space To store the configuration synchronization code, 1~OS sampling points of any bit of the received data can be correlated with the value of the corresponding bit in the configuration synchronization code, so it is enough to reserve only N bits of synchronization code storage space. figure 1 can be simplified as figure 2 , the storage space for the synch...

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Abstract

The invention discloses a frame synchronization system and method for shortening the total calibration and synchronization time. The system comprises a delay module, a calibration execution module, a judgment module, a shift register array and a correlation operation module. Demodulation data output by the demodulation module is divided into two paths, one path directly enters the calibration execution module, and the other path enters the calibration execution module through the time delay module. A delay module is added before correlation operation, and a certain length of delay is carried out on part of received data. The data of the delay part does not take effect in the correlation operation immediately, and the time length of the delay is used for the calibration process, so that the total time length of the calibration process and the synchronization process is shortened. Relative to the time point at which effective data arrives, the time point at which the receiver is opened in advance is properly delayed, which is equivalent to shortening the working time of the receiver. According to the system adopting the frame synchronization method provided by the invention in the same time, the total working duration of the receiver is shortened, and the dynamic power consumption of the receiver can be effectively reduced.

Description

technical field [0001] The invention belongs to the technical field of wireless communication, and relates to a frame synchronization system and method for shortening the total duration of calibration and synchronization. Background technique [0002] Today, with the rapid development of wireless communication technology, the performance of communication systems is improving day by day, which inevitably puts forward higher requirements for the performance of radio frequency chips. In order to achieve better receiving performance, the radio frequency receiver must complete one or more calibrations in a very short time before receiving useful signals, such as gain control (AGC), frequency offset calibration (frequency offset cancellation), DC calibration ( dc offset cancellation), etc. These calibrations must be performed every time you enter the receiving mode. Each calibration takes a certain amount of time to complete, and in order to avoid the interference between the two ...

Claims

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Application Information

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IPC IPC(8): H04J3/06
CPCH04J3/0608H04J3/0605H04J3/0682Y02D30/70
Inventor 梁晓峰陈海波唐贝贝李啟彬武俊强
Owner 国芯科技(广州)有限公司
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