Semiconductor device and method of manufacturing semiconductor device
A semiconductor and conductive pattern technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the difficulties in aligning conductive bonding patterns and conductive patterns, reduce the reliability of semiconductor devices, and increase process defects And other issues
Pending Publication Date: 2022-06-17
SK HYNIX INC
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- Description
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- Application Information
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Problems solved by technology
As the CD of the conductive pattern decreases, it becomes difficult to align the conductive bonding pattern with the conductive pattern
Therefore, process defects may increase and reliability of the semiconductor device may decrease
Method used
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[0014] For the purpose of describing implementations in accordance with the concepts of the present disclosure, specific structural or functional descriptions disclosed herein are merely exemplary. Embodiments in accordance with the concepts of the present disclosure may be implemented in various forms and should not be construed as limited to the specific embodiments set forth herein.
[0015] In embodiments of the present disclosure, terms such as first and second may be used to distinguish one component from another. These components are not limited by these terms.
[0016] Embodiments of the present disclosure provide a semiconductor device capable of improving reliability of the semiconductor device and a method of manufacturing the same.
[0017] figure 1 It is a perspective view schematically showing a part of a semiconductor device according to an embodiment of the present disclosure.
[0018] refer to figure 1 , the semiconductor device may include a plurality of ...
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The invention relates to a semiconductor device and a method of manufacturing the same. A semiconductor memory device and a method of manufacturing the same are provided. The semiconductor memory device includes: a conductive pattern; an etch stop layer on the conductive pattern; a conductive bonding pattern including a contact portion connected to the conductive pattern and a pad portion extending from the contact portion; a first dielectric layer disposed on the etch stop layer and spaced apart from the conductive bonding pattern; and a second dielectric layer including a first portion surrounding a sidewall of a contact portion of the conductive bonding pattern between the pad portion of the conductive bonding pattern and the etch stop layer, and a second portion extending from the first portion to cover an upper surface of the first dielectric layer.
Description
technical field [0001] The present disclosure may relate to a semiconductor device and a method of fabricating the same, and more particularly, to a semiconductor device including a bonding pattern and a method of fabricating the same. Background technique [0002] The semiconductor device may include circuit structures connected to each other through conductive bonding patterns. Each circuit structure may include a plurality of conductive patterns. [0003] In order to increase the integration degree of the semiconductor device, the critical dimension (CD) of the conductive pattern may be reduced. As the CD of the conductive pattern decreases, it becomes difficult to align the conductive bonding pattern with the conductive pattern. Therefore, process defects may increase and reliability of the semiconductor device may decrease. SUMMARY OF THE INVENTION [0004] According to an embodiment of the present disclosure, a semiconductor device may include: a conductive patter...
Claims
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IPC IPC(8): H01L23/538H01L27/11524H01L27/1157H01L21/768
CPCH01L23/5386H01L21/76897H01L21/76835H01L21/76829H10B41/35H10B43/35H10B41/10H10B41/27H10B43/10H10B43/27H01L24/06H01L24/09H01L23/528H01L25/0657H10B41/41H10B41/50H10B43/40H10B43/50
Inventor 吴在永李南宰
Owner SK HYNIX INC