Integrated circuit resistance extraction method based on parallel algorithm

A technology of integrated circuits and parallel algorithms, applied in the field of integrated circuits

Active Publication Date: 2022-07-01
青岛展诚科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method is not applicable if the circuit is very large and requires more threads

Method used

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  • Integrated circuit resistance extraction method based on parallel algorithm
  • Integrated circuit resistance extraction method based on parallel algorithm
  • Integrated circuit resistance extraction method based on parallel algorithm

Examples

Experimental program
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Embodiment Construction

[0030] The invention creates and adopts a new method to quickly find out the connection relationship of the circuit and calculate the resistance. It not only avoids the accuracy problem caused by the conductor being cut, but also can perform parallel calculation in more detail.

[0031] S1, execute the storage method;

[0032] First, the entire circuit is cut into several units, and all conductors are stored in the corresponding units according to the coordinates (x, y); then, if the boundaries that the conductors cross, appear in different other units, in each unit holds a pointer to a conductor;

[0033] for example image 3 Example: T1, V1 will be stored in unit (0, 0), T2 will be stored in two units (0, 0) and (0, 1), and T9 will be stored in 4 units (1, 1), (1) , 2), (2, 1), (2, 2).

[0034] S2, execute parallel algorithm;

[0035] First, based on the S1 storage method, each conductor layer in each unit runs with a thread, and each thread operates all conductors on a...

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PUM

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Abstract

The invention relates to a thread processing method in the field of integrated circuits, in particular to an integrated circuit resistance extraction method based on a parallel algorithm. The method comprises the following steps of: 1, reading layout information, and storing all conductors in corresponding units according to coordinates of the conductors or via holes and layers to which the conductors or via holes belong; step 2, firstly, establishing a thread pool, and establishing a task adding thread pool for each conductor layer of each unit; then, starting threads according to the thread number configured by a user, and performing the following operations on each thread: step two, taking out a task from a thread pool; step 2, traversing all conductors in the task, and creating nodes at places in contact with other conductors or via holes; step 2, returning the created nodes and conductors or via holes corresponding to the nodes to the host process; and step 3, all the threads run to the end, all the nodes are stored in the conductor, and the repeated nodes are deleted.

Description

technical field [0001] The invention relates to a thread processing method in the field of integrated circuits, in particular to an integrated circuit resistance extraction method based on a parallel algorithm. Background technique [0002] In the process of integrated circuit resistance extraction, it is necessary to find the connection relationship of the circuit, and then calculate the resistance according to the resistivity. With the expansion of the circuit scale, this part will be time-consuming, so large-scale circuits use multiple processes or threads. There are several approaches in existing tools: The first approach is to divide the circuit into several units, each unit using a process or thread. This method requires cutting the conductors across the cell boundaries and finally connecting them at the boundaries. This method is difficult to handle in some cases. for example figure 2 Case. Conductor 2 would be cut into 4 pieces, and it would be cumbersome and in...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F9/48
CPCG06F9/5038G06F9/5061G06F9/4806G06F2209/5011G06F2209/5018
Inventor 马胜军孙玕孙延辉
Owner 青岛展诚科技有限公司
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