Current frequency conversion circuit based on dynamic comparator and dynamic error compensation
A technology of current-frequency conversion and dynamic comparator, which is applied in the direction of high-efficiency power electronic conversion, electric pulse circuit parts, electrical components, etc., can solve the problems of misalignment and error between the clock edge and the zero crossing point, and solve the problem of clock edge The effect of misalignment with zero crossing, solving measurement error, and simplifying the circuit
Pending Publication Date: 2022-08-09
NANJING UNIV OF POSTS & TELECOMM
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Problems solved by technology
However, during the working process of the dynamic comparator, the clock edge and the zero-crossing point are often not aligned, and there is a certain error between the output result and the ideal output.
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[0026] The following examples may enable those skilled in the art to more fully understand the present invention, but do not limit the present invention in any way.
[0027] The technical problem to be solved by the present invention is the measurement error problem that the clock edge of the dynamic time comparator is not aligned with the zero-crossing point. By combining the dynamic comparator and dynamic error compensation, the error is reduced and high-precision measurement is realized. The dynamic error compensation is realized by the addition and subtraction of the signal. The traditional signal addition and subtraction requires an analog operation circuit built around the operational amplifier, but the present invention selects a four-input dynamic comparator and a sample-and-hold circuit of a switched capacitor to simplify the circuit. accomplish. Compared with the traditional scheme, the circuit we invented can effectively reduce the measurement error, such as figure...
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The invention discloses a current frequency conversion circuit based on a dynamic comparator and dynamic error compensation, which comprises an integrating circuit, the dynamic comparator, an SR latch, a sampling hold circuit and a clock source, and is characterized in that errors are eliminated according to a dynamic error compensation principle, and conversion errors of a previous conversion period are delayed and then are subtracted in a current conversion period, so that the current conversion period is shortened; and meanwhile, a new error generated by the current period conversion is transmitted to the next conversion period, and the time conversion errors can be mutually counteracted when the previous conversion time and the next conversion time are added, so that the measurement error problem that the clock edge of the dynamic comparator is not aligned with the zero crossing point is solved. The structure is simple, and the problem of measurement errors caused by misalignment of the clock edge and the zero crossing point of the dynamic comparator is effectively solved.
Description
technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a current-frequency conversion circuit based on a dynamic comparator and dynamic error compensation. Background technique [0002] Current-to-frequency conversion (I-F conversion) refers to the signal processing technology that converts the current input signal into the corresponding pulse output signal. The basic principle is to accurately quantify the current size into a proportional frequency signal. The traditional oscillating I-F conversion circuit includes an integrating circuit and a continuous-time comparator. In the traditional oscillating I-F conversion circuit, during the signal transmission process, the continuous-time comparator has a delay related to the signal slope, which makes the measurement result inaccurate. , and the continuous-time comparator always has static power consumption, which makes the total power consumption larger. In orde...
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IPC IPC(8): H03K3/037H03K3/011H03K3/01
CPCH03K3/037H03K3/011H03K3/01Y02B70/10
Inventor 贺林施恒壮郭宇锋蔡志匡
Owner NANJING UNIV OF POSTS & TELECOMM