Hardware simulation system for 51 kernel IC card

Abstract

The present invention is one kind of hardware simulator system based on FPGA completely. The available technology depends on the functions of simulator chip with high production cost, and this limit the development of the simulator system. The present invention proposes one kind of simple circuit structure, integrates the IP kernel and control circuit inside FPGA completely, adds EEPROM adaptor circuit and completes all the simulating functions only via adding small amount of RAM. The simulator consists of FPGA, RAM, non-volatile RAM, power supply circuits and PC end software. The present invention can complete the simulation development of 51-kernal IC card.

Description

technical field [0001] The invention relates to a hardware emulation system for 51-core IC cards. Background technique [0002] A hardware emulator is a necessary tool for developing CPU products. If there is no hardware emulator, the difficulty and cycle of developing CPU products will be greatly improved. The hardware emulator is a system product developed from the 1970s. Its commonly used working methods are instruction replacement, hardware interruption and the method of using emulation chips. [0003] Because the early designs usually use instruction replacement or hardware interrupts, due to the defects of these two methods, there are often defects such as setting a limit on the number of breakpoints and not being able to simulate in real time. The core method is extremely dependent on the function of the simulation chip, and the simulation system of each chip must be supported by a corresponding simulation chip. The design, tape-out, and production of the simulation ...

AI Technical Summary

Problems solved by technology

[0003] Because the early designs usually use instruction replacement or hardware interrupts, due to the defects of these two methods, there are often defects such as setting a limit on the number of breakpoints and not being able to simulate in real time. The core method is extremely dependent on the function of the simulation chip, and the simulation system of each chip must be supported by a corresponding simulation chip. The design, tape-out, and production of the simulation chip have become the bottleneck of the simulation system. Small-batch chip design and redesign of simulation chips will result in huge costs for designing and producing simulation chips, resulting in failure of product development

[0004] Due to the above shortcomings, the simulation system of CPU products has certain limitations in the performance and design of the above-mentioned various methods, which also limits the development of simulation systems for CPU products.

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