Method of forming embolism and hole

A technology of embolization holes and embolization, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as large aspect ratio, lower quality of metal lines, difficulties, etc., achieve thickness reduction, increase process tolerance, reduce Difficult effect of filling

Inactive Publication Date: 2005-12-28
MACRONIX INT CO LTD
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Problems solved by technology

[0007] The side hole 190 formed due to misalignment will cause the metal aluminum in the metal stack layer to be etched out, and the aspect ratio of the two will be very large, which will cause difficulties for the subsequent filling of the TiN layer. Therefore, Causes the final resistance to rise, reducing the quality of the metal line

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  • Method of forming embolism and hole
  • Method of forming embolism and hole
  • Method of forming embolism and hole

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Embodiment Construction

[0021] The present invention provides a kind of technological method that solves the hollow phenomenon in plugging hole etching, replaces traditional SiON layer with a spin-on-glass layer (SOG, spin on glass) or dye spin-on-glass layer (dyed SOG), not only can The un-landed phenomenon when etching the plug hole (via) is avoided, and the spin-on-glass layer or dye spin-on-glass layer also has the function of a hard mask layer, so the thickness of the photoresist layer can be reduced.

[0022] Figure 5 Shown is a cross-sectional view of a semiconductor showing the formation of metal stack layers according to the present invention. First, a substrate 500 is provided, and a metal layer 510 and an anti-oxidation reflective layer 520 are sequentially deposited on the substrate 500 by PVD deposition method, wherein the metal layer 510 is usually an aluminum layer, and the anti-oxidation reflective layer 520 is typically a TiN layer. Next, a spin-on-glass layer 535 is formed on the...

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Abstract

The invention discloses a manufacturing method capable of avoiding un-landed phenomena caused by misalignment. The method includes: providing a substrate having a metal layer and an anti-reflection layer formed thereon; forming a spin Coating glass layer (SOG, spin on glass) on the anti-reflection layer; defining a plurality of metal lines, the metal lines are completed by etching the metal layer, the anti-seismic layer and the spin-on glass layer; depositing a An oxide layer is on the substrate and covers the plurality of metal lines; and defining a plurality of plugging holes, and the plugging holes are completed by etching the oxide layer. The spin-on-glass layer of the present invention can be replaced by a dye spin-on-glass layer, at this time, the step of forming the anti-reflection layer can be omitted.

Description

technical field [0001] The invention relates to a manufacturing method of a circuit board, in particular to a manufacturing method for forming plug holes of a circuit board, which can effectively solve the hollowing phenomenon. Background technique [0002] In the semiconductor manufacturing process where the line width is continuously shrinking, some phenomena that do not pose a problem at larger line widths will gradually pose a threat to the manufacturing yield in sub-micron manufacturing, such as misalignment in the via etching step. (misalign) produced hollow (un-landed) phenomenon. [0003] Figure 1 to Figure 4 What is shown is the formation process of the embolism in the conventional technology. Such as figure 1 Shown is the situation where a metal stack layer is formed on a substrate 100. First, a metal aluminum layer 110 is formed on the substrate 100 by a PVD deposition method, and then, a PVP deposition method is also used on the metal aluminum layer 110. , f...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H01L21/28H01L21/30H01L21/768
Inventor郑培仁
OwnerMACRONIX INT CO LTD