Appts. and method of selectively controlling memory attribute

Abstract

An apparatus and method are provided for extending a microprocessor instruction set to allow for selective override of memory traits at the instruction level. The apparatus includes translation logic and extended execution logic. The translation logic translates an extended instruction into a micro instruction sequence. The extended instruction has an extended prefix and an extended prefix tag. The extended prefix specifies a memory trait for a memory reference prescribed by the extended instruction, where the memory trait for the memory reference cannot be specified by an existing instruction from an existing instruction set. The extended prefix tag indicates the extended prefix, where the extended prefix tag is an otherwise architecturally specified opcode within the existing instruction set. The extended execution logic is coupled to the translation logic. The extended execution logic receives the micro instruction sequence, and employs the memory trait to execute the memory reference.

Description

[0001] Comparison with Related Applications [0002] (0001) This application claims priority to the following US application: Case No. 10 / 227527, filed August 22, 2002. [0003] Taiwan application number filing date DOCKET NUMBER patent name 91116957 7 / 30 / 02 CNTR: 2176 extended microprocessor instruction set Device and method 91116958 7 / 30 / 02 CNTR: 2186 A device for executing conditional instructions and method 91116956 7 / 30 / 02 CNTR: 2188 Optionally control condition codes back to device and method for writing 91116959 7 / 30 / 02 CNTR: 2189 Increase the memory of the microprocessor number of devices 91124005 10 / 18 / 02 CNTR: 2190 Extended Microprocessor Data Mode device and method 91124006 10 / 18 / 02 ...

AI Technical Summary

Problems solved by technology

[0014] (0013) For many application programs, although the above-mentioned control features can significantly improve the execution speed of user-level application programs, the inventors of this case have noticed that there will still be some improvement in terms of other application programs. limitations, not only because modern memory property controls cannot be applied at the user level, but also because memory properties can only be established in page-level units

For example, if a user program that repeatedly accesses a first data structure makes an incidental reference to a second data structure, if the cache entry for the first data structure must be flushed to free up the cached If the space is used by the second data structure, the execution efficiency of the user program will be affected accordingly

Because the operating system does not predict the reference frequency of the user-level application program to the data structure, the data space of the application program is generally given a write-back feature, thus contributing to the aforementioned conflict.

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