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Multithreading recycle and dispatch system and method thereof

A multi-threaded processor, thread technology, applied in the field of multi-threaded technology, can solve problems such as expensive

Inactive Publication Date: 2006-08-23
INT BUSINESS MASCH CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

SMT can be quite expensive in hardware implementation

Method used

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  • Multithreading recycle and dispatch system and method thereof
  • Multithreading recycle and dispatch system and method thereof
  • Multithreading recycle and dispatch system and method thereof

Examples

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Embodiment Construction

[0011] In the following discussion, many specific details are proposed for a more comprehensive understanding of the present invention. However, those of ordinary skill in the art should understand that the present invention can be implemented without these specific details. In other examples, well-known elements have been shown in schematic or block diagram form to prevent the present invention from being concealed in unnecessary details.

[0012] It should be noted that, unless otherwise specified, hardware or software, or a combination thereof, can be used to perform all the functions described herein. However, in a preferred embodiment, unless otherwise specified, the functions are performed by a processor such as a computer or an electronic data processor according to codes such as computer program codes, software, and / or integrated circuits coded to perform these functions.

[0013] Reference figure 1 , The reference numeral 100 generally denotes a processor 100 having a mu...

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Abstract

A system and method is provided for improving throughput of an in-order multithreading processor. A dependent instruction is identified to follow at least one long latency instruction with register dependencies from a first thread. The dependent instruction is recycled by providing it to an earlier pipeline stage. The dependent instruction is delayed at dispatch. The completion of the long latency instruction is detected from the first thread. An alternate thread is allowed to issue one or more instructions while the long latency instruction is being executed.

Description

Technical field [0001] The present invention generally relates to improving the throughput of in-order processors, and particularly relates to multi-threading technology in in-order processors. Background technique [0002] "Multithreading" is a common technique used in computer systems to allow multiple threads to process a shared data stream. If used in a single-processor system, multithreading gives the operating system software of the single-processor system an external feature of a multi-processor system. [0003] Several multi-threading techniques are used in the prior art. For example, coarse-grain multithreading allows only one thread to be activated at a time, and when there is a thread exchange, the entire pipeline is refreshed. In this technique, a single thread runs until it encounters an event, such as a cache error (miss), and then the pipeline is drained, and the standby thread is activated (that is, swapped in). [0004] In another example, Simultaneous Multithrea...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/312G06F9/345G06F7/38G06F9/38G06F15/00
CPCG06F9/3838G06F9/3851G06F9/3836G06F9/38
Inventor 库尔特·A·费斯特戴维·希皮小艾伯特·J·范诺斯特兰德
Owner INT BUSINESS MASCH CORP
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