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High & inductor with faraday shield and dielectric well buried in substrate

An integrated circuit and inductor technology, which is applied in the design and structure of high-quality factor inductors, can solve the problems of Q increase, parasitic capacitance increase and spiral inductance, etc.

Inactive Publication Date: 2007-01-17
GLOBALFOUNDRIES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The reduction in parasitic capacitance increases the self-resonating frequency of the spiral inductor, resulting in an increase in Q

Method used

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  • High & inductor with faraday shield and dielectric well buried in substrate
  • High & inductor with faraday shield and dielectric well buried in substrate
  • High & inductor with faraday shield and dielectric well buried in substrate

Examples

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Embodiment Construction

[0032] If the FEOL (front-end-of-line) processing, i.e., the silicon substrate and active devices shown in Figure 2A is preferably done first, it can be used to fill the wells in the structure for the back-end-of-line (BEOL) The material can have a wider range of choices. In this way, the well structure does not need to risk exposure to subsequent processing steps which may equal or exceed 400°C. Then, to coat with for example SiO 2 、Si 3 N 4 , or BPSG (boron-phosphorous doped silicate glass) passivation / insulation layer FEOL silicon substrate as the basis, patterning the well corresponding to the area slightly larger than the area where the inductor is to be formed and directly below it. Using, for example, reactive ion etching (RIE), or wet etching with solutions such as TMAH (tetramethylammonium hydroxide), KOH (potassium hydroxide), EDP (ethylenediaminepyrochatechol (ethylenediamine catechol)), or using Other etchant selected for the particular substrate composition et...

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Abstract

Inductor losses to a semiconducting substrate are eliminated in an IC structure by etching a well into the substrate down to the insulating layer coating the substrate and fabricating a grounded Faraday shield in the shape of elongated segments in the bottom of the well. The well lies directly below the inductor and is optionally filled with cured low-k organic dielectric or air.

Description

technical field [0001] The invention relates to the design and structure of high-quality-factor inductors in high-frequency integrated circuits. Background technique [0002] The current environment sees rapid growth in wireless communications and wireless products such as modems, pagers, two-way radios, oscillators, and mobile phones that include integrated circuits with inductance operating at high frequencies. There is pressure to make these products more efficient, smaller, lighter and more reliable at radio and microwave frequencies. It is desirable to efficiently and economically manufacture the maximum number of required devices and components, including inductors, in a single IC, and to limit the number and type of process steps to those currently well established in IC fabrication. Pushing the performance of conventional integrated circuits into the high frequency range encounters limitations that must be overcome in order to achieve the desired goal. Inductance i...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01F17/00H01F27/36H01F41/04H01F17/02
CPCH01F17/0006H01F27/362H01F27/36H01F27/363H01L27/04
Inventor 劳尔·阿科斯塔詹妮弗·伦德罗伯特·格鲁维兹乔安娜·罗斯纳儿史蒂文·考德斯美兰妮·卡拉索
Owner GLOBALFOUNDRIES INC