Check patentability & draft patents in minutes with Patsnap Eureka AI!

Process flow for mfg. chip capable of pretesting efficiency, and testing method thereof

A test program and chip technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as waste, increase production costs, and weaken product competitiveness, so as to ensure efficiency and reduce waste.

Inactive Publication Date: 2003-05-28
VIA TECH INC
View PDF0 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Generally, after the product design undergoes the simulation verification in step 103, the probability of design errors can be greatly reduced. Guarantee that the performance of the new chip design will be higher than that of the old chip design, but it must be assembled and tested after production to know how the chip will perform in terms of performance. Not only will it take a long time to test, but once its performance is not as expected , then this batch of raw materials for manufacturing and testing will be wasted in vain, which will virtually increase the production cost and weaken the competitiveness of the product.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Process flow for mfg. chip capable of pretesting efficiency, and testing method thereof
  • Process flow for mfg. chip capable of pretesting efficiency, and testing method thereof
  • Process flow for mfg. chip capable of pretesting efficiency, and testing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0048] First, see figure 2 , is a flow chart of a preferred embodiment of the chip manufacturing process of the present invention. As shown in the figure, first, after the design of the chip is completed 201, the chip design is first verified in a simulation environment to see whether the chip design can respond correctly to each command 203, if the response is incorrect, return to Step 201 re-examines and corrects the design of the chip; if the response is correct, then the performance test of the chip design can be carried out to analyze whether its performance reaches the predetermined standard 205, if the performance fails to meet the standard, then return to step 201 and start again Revise the design of the chip; if its performance can reach the standard, the actual production of the chip can start 207 . In this way, before the actual mass production of the chip, the correctness of the chip design and the superiority of the performance can be tested first, reducing the ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A process for preparing chip whose efficacy can be tested in advance and its test method is characterized by that after a chip is designed, its functions are tested in a simulative environment, and after it passes through the test, a group of predefined test instructions are executed by it in a simulative environment while the time taken by it is recorded for comparing different designs with eachothers, so able to choosen optimal design.

Description

technical field [0001] The invention relates to a manufacturing process of a chip, in particular to a chip manufacturing process capable of pre-testing performance and a testing method thereof. Background technique [0002] In recent years, due to the rapid development of information-related industries and the trend of people seeking innovation and change, various electronic and information products have been continuously released, and existing products have been constantly refurbished or updated, which makes artificial dazzled. For manufacturers and merchants, the research and development of each new product will inevitably require various tests on samples of various specifications to verify whether the product design can operate correctly. Therefore, the quality management and testing of many products have become various A major issue for manufacturers. [0003] In the past, the main process of chip designers and manufacturers for a new chip product, from its design to p...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/00H01L21/82
Inventor 温福助韩宜杰萧进发
Owner VIA TECH INC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More