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Establishing an operating mode in a processor

An operating mode, processor technology, applied in electrical digital data processing, instruments, memory systems, etc., can solve problems such as processor non-compliance

Inactive Publication Date: 2003-06-11
ADVANCED MICRO DEVICES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, processors using the x86 architecture are not suitable for applications that require 64-bit addresses or operand sizes

Method used

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  • Establishing an operating mode in a processor
  • Establishing an operating mode in a processor
  • Establishing an operating mode in a processor

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Embodiment Construction

[0025] Hereby refer to figure 1 , in which a block diagram of an embodiment of a processor 10 is shown. The present invention is also applicable to other embodiments, or the present invention is accomplished with other embodiments. exist figure 1 In the embodiment, the processor 10 includes an instruction cache 12, an execution core 14, a data cache 16, an external interface unit 18, a memory management unit (MMU) 20, and a register file 22. In the illustrated embodiment, MMU 20 includes a set of segment registers 24, a first control register 26, a second control register 28, a local descriptor table register (LDTR) 30, a global descriptor table register (GDTR) 32 . The instruction cache memory 12 is coupled to the external interface unit 18 , the execution core 14 and the MMU 20 . The execution core 14 is further coupled to the MMU 20 , the register file 22 , and the data cache memory 16 , and the data cache memory 16 is further coupled to the MMU 20 and the external inte...

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Abstract

A processor supports a processing mode in which the address size is greater than 32 bits and the operand size may be 32 or 64 bits. The address size may be nominally indicated as 64 bits, although various embodiments of the processor may implement any address size which exceeds 32 bits, up to and including 64 bits, in the processing mode. The processing mode may be established by placing an enable indication in a control register into an enabled state and by setting a first operating mode indication and a second operating mode indication in a segment descriptor to predefined states. Other combinations of the first operating mode indication and the second operating mode indication may be used to provide compatibility modes for 32 bit and 16 bit processing compatible with the x86 processor architecture (with the enable indication remaining in the enabled state).

Description

technical field [0001] The invention relates to the field of processors, in particular to address and operand lengths in the processor. Background technique [0002] The x86 architecture (known as the IA-32 architecture) has been widely accepted in the market and has been a fairly successful product. Therefore, designing a processor using the x86 architecture has considerable advantages. The advantage of this type of processor is that it can write large-capacity software into the x86 architecture (considering that this processor can execute the software, and therefore the computer system using this processor is quite popular in the market because it has a large number of available software). [0003] As the computer system continues to develop, it is more necessary to use a 64-bit address length (sometimes later referred to as the operand size). The larger address length allows the program to have a larger memory footprint (memory capacity occupied by instructions in the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/34G06F9/318
CPCG06F9/342G06F9/30189G06F9/30185G06F9/30
Inventor 凯文·J·马克格瑞斯麦克·T·克拉克
Owner ADVANCED MICRO DEVICES INC
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