Communication facility performance testing method

Abstract

A test method for the performance of communication equipments, includes following steps: at the same time for aging test, makes building internal self-testing BIST, sets a control position in system to get the aging information. CPU tests whether or not the board is at the status of aging testing through the control position. According to the aging testing status controls the board to build internal self- testing BIST. Building internal self-testing BIST adopts loop testing, the result stores in relevant storage space; the saving of the results adopts double data backups marked with relevant sign position, the double data backup includes front two round results of loop testing, the sign position shows the relevant testing status at the time of getting this test result, takes effective testing result in a newest round as the criterion.

Description

technical field [0001] The invention relates to electric communication technology, in particular to a method for testing the performance of communication equipment. Background technique [0002] With the rapid development of information technology and the popularization of new technologies such as the Internet and multimedia, people's demand for data communication continues to grow. The market and output of large-capacity data communication products are constantly expanding, and the complexity of communication equipment is also proportional. Increase, while the design technology of communication products is becoming more and more mature, the performance test of communication products also has higher requirements. How to ensure the test quality, improve the test efficiency and reduce the test cost has become the key to the test of communication products. [0003] BIST is the abbreviation of Built-in self-test, that is, built-in self-test. This technology uses the hardware add...

AI Technical Summary

Problems solved by technology

[0006] 1. Since the existing built-in self-test BIST is carried out in the functional test stage, it takes up the production test time and reduces the production test efficiency;

[0007] 2. In the chip-level built-in self-test BIST, there is a contradiction between test completeness and test efficiency. For example, due to the long time-consuming memory complete test, in order to meet the production capacity, it is often chosen to sacri

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