45results about How to "Reduce production test costs" patented technology

Specially, the invention is related to method and device for testing performance of new type self-defined photoelectric interface of Ethernet (PIE). An adjustable optical attenuator (AOA) is setup at sending direction of optical port of Ethernet. Data packet sent by the Ethernet data test logic module (EDTLM) passes AOA, which adjusts degree of decay of the sent light, and measures light receiving sensitivity of optical fiber transceiver. A light coupler is setup at receiving direction of optical port of Ethernet. The input light passing through the light coupler is split into two routes: one route is sent to light power test module; and the other route is sent to EDTLM at same time. The invention tests performance of optical interface, and tests luminescence power of device to be tested. The invention realizes testing performance of PIE through 'one key pushed'. Features are: easy of operation, quick test, and low testing cost.

The method incldues steps as follows: 1) high level voltage is transmitted to earthing pin of integrated circuit to be tested by microcontroller; b) potentials of power pin and other outupt-input pin for integrated circuit to be tested are red in separately by microcontroller for judging which pin is in open circuit state; c) high level voltage is transmitted to output-input pin to be tested and low level voltage to earthing pin by microcontroller; d) potentials of other output-input pin and power pin are red in by microcontroller separately to judge which output-input pin is in short circuit state with the pin and whether output-input pin to be tested or the power pin is in short circuit with the earthing pin or not.

The invention discloses an over-charge voltage protection detection circuit and system. The over-charge voltage protection detection circuit comprises a detection module, a first switch module, a second switch module, a voltage dividing module, a comparison module and a reference generating module; the detection module controls the first switch module to be turned on and the second switch module to be turned off; the voltage dividing module is used for sampling an input voltage of a power input end and outputting a sampled voltage to the comparison module; the reference generating module outputs a reference voltage to the comparison module; when the sampled voltage is higher than the reference voltage, the comparison module outputs a first level signal to the detection module, and the detection module controls the input voltage to be reduced to a preset voltage; and when the sampled voltage is lower than the reference voltage, the comparison module outputs a second level signal to thedetection module, and the detection module controls the input voltage to be increased to the preset voltage. By stabilizing the input voltage at an over-charge voltage protection threshold point, accurate measurement on the over-charge voltage protection threshold point is achieved.

The disclosed testing method for communication device comprises: setting desired condition in device software; during device aging, when according to the condition, taking test. This invention can make full use of aging time to complete auto testing with high efficiency.

The invention discloses a method for adaptively adjusting working voltage of chips. The method comprises the following steps of: respectively detecting to obtain a leakage current value of each chip; saving the obtained leakage current value and/or a working voltage value corresponding to the leakage current value; setting a voltage adjustment parameter of a power supply according to the corresponding relation between the leakage current value and the working voltage or a saved working voltage value; and providing the corresponding working voltage for each chip based on the voltage adjustment parameter. The invention also provides a system for adaptively adjusting working voltage of the chips. The lowest working voltage of each chip is determined according to the relation between the leakage current value and the working voltage, and the working voltage of the chip is adjusted to the lowest working voltage after the chip is started, so that the working voltage of the chip can be determined according to the physical property of the chip based on the condition of different working voltages caused by the chip difference brought by a chip manufacturing procedure, therefore, the power consumption of the chip is effectively controlled, and the cost of a production test is reduced.

The invention provides a software target vehicle for testing an automobile ADAS system. The soft target vehicle comprises a remote control base station and a test vehicle; the remote control base station comprises a PC host and a first communication device, and the PC host is connected with the first communication device; the test vehicle comprises a simulated vehicle body, a mobile platform and amobile monitoring device, the simulated vehicle body does not crash the vehicle to be tested, and placed on the mobile platform, a mobile monitor is mounted on the mobile platform, and used for monitoring walking of the mobile platform, a turning device and a driving device are mounted in the bottom of the mobile platform, and the vehicle to be tested gets on the mobile platform; and the mobile monitoring device comprises a second communication device, a control device, a driving device, a steering device, a braking device, a GPS/inertial navigation system and a power supply device. A test system can enable the vehicle to move, and solves the problem that the tested vehicle crashes on the vehicle to be tested.

The invention relates to a chip peripheral anti-fuse pre-trimming circuit and a trimming method thereof. The trimming method comprises the following steps: calculating a rough pre-trimming value by using a formula according to an electrical parameter initial value and an electrical parameter target value which are tested before melting, and converting to obtain a rough pre-trimmed anti-fuse combination; according to the rough pre-trimming anti-fuse combination, carrying out the rough virtual fusion burning on the anti-fuse, and testing a rough electrical parameter value; calculating a pre-trimming value deviation by using the designed trimming step length of the electrical parameter, the rough electrical parameter value and the electrical parameter target value; determining an accurate pre-trimming range according to the pre-trimming value deviation, performing virtual fusion burning on the anti-fuse according to each anti-fuse trimming combination in the accurate pre-trimming range, testing a corresponding electrical parameter pre-trimming value, and obtaining an accurate anti-fuse combination when the tested electrical parameter value is closest to a target value under a certain anti-fuse combination; carrying out fusion burning on the antifuse according to the precise antifuse combination, and testing and verifying whether an error between the final value and the target value of the electrical parameter meets the requirement or not.

The invention discloses an electric energy meter function test tool, and relates to an electric energy meter test apparatus. A 220V power source is successively connected with isolation transformers and switch power sources, the switch power sources are connected with test control units and test operation units, the test control units are connected with the test operation units, a dual-meter-position linkage control button switch is connected with the two test control units, MCU microprocessor units are in bidirectional connection with RS485 communication units, infrared communication units and RS232 communication units, clock signal acquisition units and pulse signal acquisition units are accessed to the MCU microprocessor units, the test control units are connected with detected electric energy meters through connection devices, and the detected electric energy meters are installed on connector bases of the connection devices and are compacted and fixed through fixation pressure bars. The operation is simple, the production test efficiency is high, the cost is low, the automation degree is high, the test accuracy is good, the requirement for operation skills of operators is low, and the stability and reliability are high.

The invention discloses a clock signal source with low phase noise and adjustable duty cycle. The clock signal source comprises an instruction generation unit, a communication processing unit, a central control unit, a digital-to-analog converter, a phase-locked loop, a clock oscillator, a transformer and a high-speed comparator, wherein the instruction generation unit is used for generating a control signal instruction that controls the output clock duty cycle and frequency; the communication processing unit is used for encoding the control signal instruction to generate a control signal bit stream; the central control unit is used for analyzing the specific meaning of the control signal bit stream and generating a corresponding first control bit stream and a second control bitstream; the digital-to-analog converter is used for receiving the first control bit stream and obtaining a first control signal; the phase-locked loop is used for receiving the second control bit stream and generating a differential clock output with adjustable frequency; the clock oscillator is used for providing a low-noise reference frequency source for the phase-locked loop; the transformer is used for converting the differential clock output to a single-end clock output to obtain a second control signal; and the high-speed comparator is used for receiving the first control signal and the second control signal and controlling the clock output unit to output a low-noise clock signal with the set frequency and duty cycle. By adopting the clock signal source disclosed by the invention, the cost of a test system of the digital-to-analog converter can be reduced.

A multifunctional test signal generator/distributor for large-scale production of video products. The invention provides a test signal generator/distributor module. in allusion to problems of low automation degree, high labor cost and low testing efficiency and precision existing in large-scale production of video products such as televisions, tablet computers, DVD and the like, a test scheme with low cost, high efficiency and flexible configuration is provided. The multifunctional test signal generator/distributor supports various video interfaces and various resolutions of HDMI, DVI, VGA, DisplayPort, LVDS, YPbPr, YCbCr, composite video and the like, and can be used separately or used along with any automatic test machines. The multifunctional test signal generator/distributor is composed of multiple configurable modules, provides a prefabricated internal test signal or inputs a test signal from outside, also can download a custom test signal on line, and supports simultaneous test of at least four stations. The invention also provides an HDCP/EDID test function, and a test result is displayed on display equipment in the form of a small window.

A semi-anechoic box for wide frequency bandwidth measurement comprises a barrel-shaped box body, a measurement microphone is arranged at the center of the box body, sound absorption materials or sound absorption structures are arranged on the inner walls of all faces, except the face where an object to be measured is installed, of the box body, the space standoff distances between the microphone and the surfaces of the sound absorption materials or the sound absorption structures are more than 20 cm, the space standoff distances are related to the minimum measuring frequency for measuring, and the lower the minimum measuring frequency is, the larger the space standoff distances are. The cross section of the interior of the barrel-shaped box body is polygonal, and the cross section of an outer box body is rectangular. According to the barrel-shaped box body, space occupied by sound insulation and absorption materials is small, no special large-size test chamber is needed, use convenience is achieved, large-scale product quality detection is facilitated, and production test cost is lowered; the sound insulation and absorption materials are firmly installed, and test operations are easy and convenient; because the sound insulation property is good, a measuring device is less disturbed by the outside, and accordingly test precision is high, test data repeatability is good and the semi-anechoic box can be used in different environments.

The present invention provides a test device simulating a plurality of memories and a test method thereof, which are used for testing a plurality of first memory connectors of a computer. Multiple first access commands are sent out by the computer to the test device through the first memory connectors so as to simulate the access operation for multiple access zones in the memories. The test device comprises a control unit and a test access zone. The control unit is coupled with the test access zone, and the first access commands are received by the control unit. The test access zone is used for simulating the access zones, and the control unit makes responses to the first access commands, and carries out the access operation of the first access commands for the test access zone. In the present invention, one access zone is arranged in a computer memory. The computer memory, different from the hard disk drive, has the characteristics of high reading-writing speed, so the test speed is high. Compared with the hard disk drive, the computer memory also has the advantages of small volume, good vibration resistance and little possibility of damage, so the production and test cost can be reduced.

The invention provides an efficient testing device for a mainboard. The efficient testing device comprises a supporting base, a mainboard tray, a lifting device, a CPU fixing mechanism and external test equipment, wherein the mainboard tray is fixedly arranged on the supporting base; the bottom part of the lifting device is fixedly arranged on the supporting base, and the lifting device is locatedabove the mainboard tray; the CPU fixing mechanism is fixedly connected with the movable end of the lifting device; the external test equipment is arranged on the supporting base; during testing, a to-be-tested mainboard is placed on the mainboard tray, and the external test equipment is connected with the to-be-tested mainboard; a CPU on the CPU fixing mechanism is linked with a CPU groove in the to-be-tested mainboard by means of the lifting device for contact testing; and after the testing is finished, the CPU on the CPU fixing mechanism is linked to leave the CPU groove in the to-be-tested mainboard by means of the lifting device. The efficient testing device has the advantages that the debugging production efficiency is improved, and the loss cost of the high-value CPU processor chipin the production test process is reduced.

The invention discloses a tool board and a method of conducting tests via the tool board. The tool board includes: at least one linker, which is matched with a linker on a veneer and used for leading a test signal on the veneer out to at least one testing point. The one testing point is arranged on the tool board and used for providing a testing needle with the test signal. The method of conducting tests via the tool board comprises the following steps: the veneer is installed on the tool board; the linker on the tool board leads the test signal on the veneer out to the testing points on the tool board; the veneer is tested through the testing points. In virtue of the invention, the bulk of an electronic product can be effectively reduced.

The invention relates to an automatic testing system of a comprehensive protection device. A pure manual mode is adopted in the conventional production testing; after a device is manually positioned on a testing tool by an operator, analog acquisition, testing of external input such as input and factory setting such as channel zero calibration and calibration of a channel coefficient are manually finished; and after relative operation is finished, test record data is filled manually in a preprinted test report, and all steps are finished by the operator, so that more unreliability factors, high risk and low efficiency are caused. According to the automatic testing system, whether hardware of the YZ series comprehensive protection devices work normally can be quickly detected in an automatic mode, and a clear problem existing in the hardware is positioned through detection. According to the system, the conventional manual testing process can be substituted, the operation is easy, the use is convenient, the testing of the comprehensive protection device can be finished by only operating a PC (Personal Computer) by the operator, the production test efficiency can be greatly increased, and the production test cost is reduced.

The invention discloses an MEMS inertial navigation system calibration method. The method comprises the following steps: S1, loading an inertial navigation system into a rotary table; s2, electrifying the rotary table; s3, measuring calibration data of the rotary table at the calibration position within a preset temperature range; s4, substituting the calibration data into the error compensation model of the gyroscope and the acceleration to calculate a corresponding parameter result; and S5, burning the parameters into the inertial navigation system. According to the invention, the calibration time is greatly shortened, the test efficiency is effectively improved, and the production test cost is saved.

The invention relates to an anti-fuse trimming circuit and a trimming method thereof. The anti-fuse trimming circuit comprises a constant current source circuit, a detection circuit, an anti-fuse, an isolation current-limiting circuit and a power supply voltage VDD, and the constant current source circuit is sequentially connected with the detection circuit, the isolation current-limiting circuit and the anti-fuse. When the detection circuit detects that the state voltage VS is greater than a certain threshold voltage VTH (VTH is greater than or equal to 1.5 V), a trimming logic signal TSi output by the detection circuit is at a low level; and when the detection circuit detects that the state voltage VS is smaller than the threshold voltage VTH, the trimming logic signal TSi output by the detection circuit is at a high level.