Image processing device and method
An image processing device and image processing technology, applied in image data processing, processor architecture/configuration, image enhancement, etc., can solve the problems of large size of vertical and horizontal circuits, hindering processing speed, and large amount of data.
Inactive Publication Date: 2004-04-21
SONY CORP
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Problems solved by technology
[0033] However, as described above, the related image processing apparatus distributes data globally to processing units and then performs structural filtering, so the amount of data with global distribution is large (for example, 4Tbps), and the crossbar circuit used as a global bus becomes smaller in size. Disadvantages such as being larger and hindering the increase in processing speed from the point of view of interconnection delay
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[0061] Fig. 4 is a block diagram showing the configuration of an embodiment of the image processing apparatus according to the present invention.
[0062] As shown in FIG. 4 , the image processing apparatus 10 according to the present embodiment has a setting circuit 11 , processing blocks 12 - 0 to 12 - 3 , and a crossbar circuit 13 .
[0063] In the present image processing apparatus 10, a plurality, four in this embodiment, of the processing modules 12-0 to 12-3 are connected to the setting circuit 11 in parallel. A plurality of processing modules 12-0 to 12-3 share processing data for parallel processing.
[0064] However, for a structure readout system, memory access to other processing modules is required, but the crossbar circuit 13, which serves as a global access bus, is used for such access.
[0065] Hereinafter, the structure and functional order of components will be described with reference to the drawings.
[0066] The setting circuit 11 controls the data trans...
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An image processing apparatus and method which can achieve a reduction in size of the crossbar circuit and achieve a higher speed of processing, which perform DDA processing (ST11), then read out texture data from a memory (ST12), perform sub-word reallocation processing (ST13), then perform texture-filtering (ST14), then globally distribute data by the crossbar circuit (13) to a first operation processing element of each processing module (ST15), then perform processing at the pixel level, specifically use the texture data after filtering and the various types of data after rasterization to perform operations by pixel units and draw the pixel data passing the various types of tests in the processing at the pixel level to a frame buffer on a memory module (ST16).
Description
technical field [0001] The present invention relates to an image processing device and method thereof, wherein a plurality of processing devices share processing data for parallel processing. Background technique [0002] In recent years, graphics large-scale integration (LSI) for high-speed 3D computer graphics by hardware has become quite popular. In particular, in game systems and personal computers (PCs), such graphic LSIs are often installed as standard equipment. [0003] In addition, ongoing technological progress in graphic LSIs has been rapid. Functional expansion in "Vertex Shader" and "Pixel Shader" as used in "Direct x Instruction X" is ongoing and has improved performance at a faster rate than the CPU . [0004] In order to improve the performance of a graphic LSI, it is effective not only to increase the operating frequency of the LSI but also to utilize parallel processing technology. Parallel processing techniques can be broadly classified as follows: ...
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IPC IPC(8): G06F15/16G06F15/173G06F15/80G06F17/10G06T1/20G06T5/20
CPCG06T1/20G06T15/005G06T15/04G06T17/00G06F15/16G06F17/10
Inventor 佐藤仁
Owner SONY CORP