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Method for multibank memory scheduling

A storage bank, memory technology, applied in static memory, digital memory information, information storage and other directions, can solve problems such as complex logic circuits

Inactive Publication Date: 2005-03-09
THOMSON LICENSING SA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, in this case, very complex logic circuits are required to control the data flow

Method used

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  • Method for multibank memory scheduling
  • Method for multibank memory scheduling
  • Method for multibank memory scheduling

Examples

Experimental program
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Embodiment Construction

[0030] exist figure 1The access to the two memory banks 1, 2 of the SDRAM using the method according to the invention is shown in . For simplicity, accesses are divided into a sequence of states of the bank, which are in figure 1 Parts a) to j) of . For clarity, only a single complete output block is written to one bank 1,2 in the figure. Of course, multiple output blocks can be written to the memory bank sequentially. When the access starts, both banks 1 and 2 are empty, which corresponds to figure 1 a). As shown in part b), in the left bank 1, a pointer 5 is set to mark the size of the output block. The input stream 6 from the driver is now stored in left bank 1, which is shown in part c). The buffer can be read once pointer 5 is reached. Write operations to left bank 1 continue until a read access occurs. This is shown in part d). Thus, the first memory bank 1 is filled with a plurality of output blocks. After the first read access to left bank 1, the input stream...

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Abstract

The present invention relates to a method for scheduling and controlling access to a multibank memory having at least two banks (1, 2), and to an apparatus for reading from and / or writing to recording media using such method. According to the invention, the method comprises the steps of: writing an input stream (6) to the first bank (1); switching the writing of the input stream (6) to the second bank (2) when a read command for the first bank (1) is received; and switching the writing of the input stream (6) back to the first bank (1) when a read command for the second bank (2) is received.

Description

technical field [0001] The present invention relates to a method of scheduling and controlling access to a multibank memory, and to an apparatus for reading from and / or writing to a recording medium using such a method. Background technique [0002] In the following the invention is explained with reference to Synchronous Dynamic Random Access Memory (SDRAM). However, the present invention is applicable to any kind of DRAM, such as Double Data Rate RAM (DDR-RAM), Enhanced Synchronous DRAM (ESDRAM), Synchronous Linked DRAM (SLDRAM), Rambus DRAM (RDRAM), etc. Moreover, the present invention is also applicable to single-channel static random access memory (single-channel SRAM). [0003] A typical SDRAM module includes four separate memory banks. Each memory bank is made up of rows, which in turn are made up of columns. In order to access the data, the corresponding row on the corresponding memory bank is opened for reading and writing by command "activate". After the activa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/06G06F12/02G11C7/10G11C11/407
CPCG11C7/1042G06F12/02G06F12/06
Inventor 蒂姆·尼格迈耶托马斯·布龙
Owner THOMSON LICENSING SA
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